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參數資料
| 型號： | PPG33F-4M |
| 英文描述： | Peripheral IC |
| 中文描述： | 外圍芯片 |
| 文件頁數： | 1/5頁 |
| 文件大小： | 68K |
| 代理商： | PPG33F-4M |
PPG33F
Doc #97010
DATA DELAY DEVICES, INC.
3 Mt. Prospect Ave. Clifton, NJ 07013
1
3-BIT PROGRAMMABLE
PULSE GENERATOR
(SERIES PPG33F)
FEATURES
PACKAGES
Digitally programmable in 7 steps
Monotonic pulse-width-vs-address variation
Rising edge triggered
Two separate outputs: inverting & non-inverting
Precise and stable pulse width
Input & outputs fully TTL interfaced & buffered
10 T
2
L fan-out capability
Fits standard 14-pin DIP socket
Auto-insertable
FUNCTIONAL DESCRIPTION
The PPG33F-series device is a 3-bit digitally programmable pulse
generator. The width, PW
A
, depends on the address code (A2-A0)
according to the following formula:
PW
A
= PW
0
+ T
INC
* A
where A is the address code, T
INC
is the incremental pulse width of the
device, and PW
0
is the inherent pulse width of the device. The
incremental width is specified by the dash number of the device and can range from 0.5ns through 50ns,
inclusively. RESET is held LOW during normal operation. When it is brought HIGH, OUT and OUT/ are
forced into LOW and HIGH states, respectively, and the unit is ready for the next trigger input. The
address is not latched and must remain asserted while the output pulse is active.
SERIES SPECIFICATIONS
Programmed pulse width tolerance:
5% or 1ns,
whichever is greater
Inherent width (PW
0
):
9ns typical
Inherent delay (T
TO
):
3.5ns
±
2ns
Operating temperature:
0
°
to 70
°
C
Supply voltage V
CC
:
5VDC
±
5%
Supply current:
I
CC
= 41ma typical
1997 Data Delay Devices
data
delay
devices,
inc.
3
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
TRIG
OUT
N/C
N/C
N/C
N/C
RES
GND
VCC
OUT/
N/C
N/C
N/C
A0
A1
A2
14
13
12
11
10
9
8
1
2
3
4
5
6
7
TRIG
OUT
N/C
N/C
N/C
RES
GND
VCC
OUT/
N/C
N/C
A0
A1
A2
DIP
PPG33F-xx Commercial
PPG33F-xxM Military
Gull-Wing
PPG33F-xxC3 Commercial
PPG33F-xxMC3 Military
PIN DESCRIPTIONS
TRIG
OUT
OUT/
A0-A2 Address Bits
RES
Reset
VCC
+5 Volts
GND
Ground
Trigger Input
Non-inverted Output
Inverted Output
DASH NUMBER SPECIFICATIONS
Part
Number
PPG33F-.5
PPG33F-1
PPG33F-2
PPG33F-3
PPG33F-4
PPG33F-5
PPG33F-6
PPG33F-8
PPG33F-10
PPG33F-20
PPG33F-30
PPG33F-40
PPG33F-50
Incremental Width
Per Step (ns)
0.5
±
0.3
1
±
0.4
2
±
0.4
3
±
0.5
4
±
0.5
5
±
0.6
6
±
0.7
8
±
0.8
10
±
1.0
20
±
1.5
30
±
1.8
40
±
2.0
50
±
2.5
Total Width
Change (ns)
3.50
±
1.00
7.00
±
1.00
14.0
±
1.00
21.0
±
1.05
28.0
±
1.40
35.0
±
1.75
42.0
±
2.10
56.0
±
2.80
70.0
±
3.50
140
±
7.00
210
±
10.5
280
±
14.0
350
±
17.5
NOTE: Any dash number between .5 and 50 not
shown is also available.
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相關PDF資料 |
PDF描述 |
|---|---|
| PPG33F-4MC3 | Peripheral IC |
| PPG33F-5 | Peripheral IC |
| PPG33F-50 | Peripheral IC |
| PPG33F-50C3 | Peripheral IC |
| PPG33F-50M | Peripheral IC |
相關代理商/技術參數 |
參數描述 |
|---|---|
| PPG33F-4MC3 | 制造商:DATADELAY 制造商全稱:Data Delay Devices, Inc. 功能描述:3-BIT PROGRAMMABLE PULSE GENERATOR (SERIES PPG33F) |
| PPG33F-5 | 制造商:DATADELAY 制造商全稱:Data Delay Devices, Inc. 功能描述:3-BIT PROGRAMMABLE PULSE GENERATOR (SERIES PPG33F) |
| PPG33F-50 | 制造商:DATADELAY 制造商全稱:Data Delay Devices, Inc. 功能描述:3-BIT PROGRAMMABLE PULSE GENERATOR (SERIES PPG33F) |
| PPG33F-50C3 | 制造商:DATADELAY 制造商全稱:Data Delay Devices, Inc. 功能描述:3-BIT PROGRAMMABLE PULSE GENERATOR (SERIES PPG33F) |
| PPG33F-50M | 制造商:DATADELAY 制造商全稱:Data Delay Devices, Inc. 功能描述:3-BIT PROGRAMMABLE PULSE GENERATOR (SERIES PPG33F) |
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