Features ? Single-chip integrated USB transceiver, SIE, and enhanced 8051 microprocessor ? Fit, form and function upgradable to the FX2LP (CY7C68013A) — Pin-compatible — Object-code-compatible — Functionally-compatible (FX1 functionality is a Subset of the FX2LP) ? Draws no more than 65 mA in any mode making the FX1 suitable for bus powered applications ? Software: 8051 runs from internal RAM, which is: — Downloaded via USB — Loaded from EEPROM — External memory device (128-pin configuration only) ? 16 KBytes of on-chip Code/Data RAM ? Four programmable BULK/INTERRUPT/ISOCHRONOUS endpoints — Buffering options: double, triple, and quad ? Additional programmable (BULK/INTERRUPT) 64-byte endpoint ? 8- or 16-bit external data interface ? Smart Media Standard ECC generation ? GPIF — Allows direct connection to most parallel interfaces; 8- and 16-bit — Programmable waveform descriptors and configuration registers to define waveforms — Supports multiple Ready (RDY) inputs and Control (CTL) outputs ? Integrated, industry standard 8051 with enhanced features — Up to 48-MHz clock rate — Four clocks per instruction cycle — Two USARTS — Three counter/timers — Expanded interrupt system — Two data pointers ? 3.3V operation with 5V tolerant inputs ? Smart SIE ? Vectored USB interrupts ? Separate data buffers for the Setup and DATA portions of a CONTROL transfer ? Integrated I 2 C controller, runs at 100 or 400 KHz ? 48-MHz, 24-MHz, or 12-MHz 8051 operation ? Four integrated FIFOs —Brings glue and FIFOs inside for lower system cost —Automatic conversion to and from 16-bit buses —Master or slave operation —FIFOs can use externally supplied clock or asynchronous strobes —Easy interface to ASIC and DSP ICs ? Vectored for FIFO and GPIF interrupts ? Up to 40 general purpose I/Os ? Three package options—128-pin TQFP, 100-pin TQFP, and 56-pin QFN Lead-free

Functional Description EZ-USB FX1? (CY7C64713/4) is a full-speed highly integrated, USB microcontroller. By integrating the USB transceiver, serial interface engine (SIE), enhanced 8051 microcontroller, and a programmable peripheral interface in a single chip, Cypress has created a very cost-effective solution that provides superior time-to-market advantages. Because it incorporates the USB transceiver, the EZ-USB FX1 is more economical, providing a smaller footprint solution than USB SIE or external transceiver implementations. With EZ-USB FX1, the Cypress Smart SIE handles most of the USB protocol in hardware, freeing the embedded microcontroller for application-specific functions and decreasing development time to ensure USB compatibility. The General Programmable Interface (GPIF) and Master/ Slave Endpoint FIFO (8- or 16-bit data bus) provides an easy and glueless interface to popular interfaces such as ATA, UTOPIA, EPP, PCMCIA, and most DSP/processors. Three lead-free packages are defined for the family: 56 QFN, 100 TQFP, and 128 TQFP.

Applications ? DSL modems ? ATA interface ? Memory card readers ? Legacy conversion devices ? Home PNA ? Wireless LAN ? MP3 players ? Networking The “Reference Designs” section of the cypress website provides additional tools for typical USB applications. Each reference design comes complete with firmware source and object code, schematics, and documentation. Please visit http://www.cypress.com for more information.

USB Signaling Speed FX1 operates at one of the three rates defined in the USB Specification Revision 2.0, dated April 27, 2000: ? Full speed, with a signaling bit rate of 12 Mbps. FX1 does not support the low-speed signaling mode of 1.5 Mbps or the high-speed mode of 480 Mbps。

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