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參數資料
型號: PSD301R-A-70J
廠商: 意法半導體
英文描述: Low Cost Field Programmable Microcontroller Peripherals
中文描述: 低成本現場可編程微控制器外圍設備
文件頁數: 44/85頁
文件大小: 691K
代理商: PSD301R-A-70J
PSD3XX Famly
41
-70
-90*
-15
CMiser
On =
Add
Turbo
Of =
Add
Symbol
Parameter
Unit
Min
Max
Min
Max
Min
Max
Track Mode Address
Propagation Delay:
CSADOUT1 Already True
22
22
28
0
0
ns
T23
Latched Address Outputs,
Port A
22
22
28
0
0
Track Mode Address
Propagation Delay:
CSADOUT1 Becomes True
During ALE or AS
T23A
33
33
50
0
10
ns
Track Mode Trailing Edge of
ALE or AS to Address High-Z
T24
30
32
35
0
0
ns
T25
Track Mode Read Propagation
Delay
27
29
35
0
0
ns
T26
Track Mode Read Hold Time
5
29
11
29
11
29
0
0
ns
T27
Track Mode Write Cycle,
Data Propagation Delay
18
20
30
0
0
ns
Track Mode Write Cycle,
Write to Data Propagation Delay
T28
6
30
8
30
9
40
0
10
ns
Hold Time of Port A Valid
During Write CSOi
2
Trailing Edge
T29
2
2
2
0
0
ns
T30
CSI Active to CSOi
2
Active
8
37
9
40
9
50
0
0
ns
T31
CSI Inactive to CSOi
2
Inactive
8
37
9
40
9
50
0
0
ns
T32
Direct PAD Input
3
as Hold Time
0
10
12
0
0
ns
T33
R/W Active to E or DS Start
18
20
30
0
0
ns
T34
E or DS End to R/W
18
20
30
0
0
ns
T35
AS Inactive to E high
0
0
0
0
0
ns
T36
Address to Leading Edge
of Write
18
20
25
0
0
ns
18.7 Timng Parameters – PSD3XX/ZPSD3XX (All 5 V devices)
(cont.)
NOTES:
1. ADi = any address line.
2. CSOi = any of the chip-select output signals coming through Port B (CS0–CS7) or through Port C (CS8–CS10).
3. Direct PAD input = any of the following direct PAD input lines: CSI/A19 as transparent A19, RD/E/DS, WR or
R/W, transparent PC0–PC2, ALE (or AS).
4. Control signals RD/E/DS or WR or R/W.
*
-90 speed available only on Industrial Temperature versions.
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