- 您現在的位置：買賣IC網 > PDF目錄376254 > PSD303-70JI (意法半導體) Low Cost Field Programmable Microcontroller Peripherals PDF資料下載
參數資料
| 型號： | PSD303-70JI |
| 廠商： | 意法半導體 |
| 英文描述： | Low Cost Field Programmable Microcontroller Peripherals |
| 中文描述： | 低成本現場可編程微控制器外圍設備 |
| 文件頁數： | 18/85頁 |
| 文件大?。?/td> | 691K |
| 代理商： | PSD303-70JI |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁當前第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁
15
PSD3XX Famly
10.0
I/OPort
Functions
The PSD3XX has three I/O ports (Ports A, B, and C) that are configurable at the bit level.
This permits great flexibility and a high degree of customization for specific applications.
The next section describes the control registers for the ports. Following that are sections
that describe each port. Figures 5 through 7 show the structure of Ports A through C,
respectively.
Note:
any unused input should be connected directly to ground or pulled up to V
CC
(using a 10K
to 100K
resistor).
10.1 CSIOPORT Registers
Control of the ports is primarily handled through the CSIOPORT registers. There are 24
bytes in the address space, starting at the base address labeled CSIOPORT. Since the
PSD3XX uses internal address lines A15-A8 for decoding, the CSIOPORT space will
occupy 2 Kbytes of memory, on a 2 Kbyte boundary. This resolution can be improved to
reduce wasted address space by connecting lower order address lines (A7 and below)
to Port C. Using this method, resolution down to 256 Kbytes may be achieved. The
CSIOPORT space
must be defined in your PSDsoft design file
. The following tables list
the registers located in the CSIOPORT space.
16-Bit Users Note
When referring to Table 5B, realize that Ports A and B are still accessible on a byte basis.
Note: When accessing Port B on a 16-bit data bus, BHE must be low.
Table 5A. CSIOPORT Registers for 8-Bit Data Busses
NOTE:
1. ZPSD only.
Ofset (in hex)
fromCSIOPORT
Base Address
Type of
Access
Allowed
Register Name
Port A Pin Register
Port A Direction Register
Port A Data Register
Port B Pin Register
Port B Direction Register
Port B Data Register
Power Management Register (Note 1)
Page Register
+2
+4
+6
+3
+5
+7
+10
+18
Read
Read/Write
Read/Write
Read
Read/Write
Read/Write
Read/Write
Read/Write
Table 5B. CSIOPORT Registers for 16-Bit Data Busses
NOTE:
1. ZPSD only.
Ofset (in hex)
fromCSIOPORT
Base Address
Type of
Access
Allowed
Register Name
Port A/B Pin Register
Port A/B Direction Register
Port A/B Data Register
Power Management Register (Note 1)
Page Register
+2
+4
+6
+10
+18
Read
Read/Write
Read/Write
Read/Write
Read/Write
相關PDF資料 |
PDF描述 |
|---|---|
| PSD303-70JM | Low Cost Field Programmable Microcontroller Peripherals |
| PSD303-B-15U | Low Cost Field Programmable Microcontroller Peripherals |
| PSD303-B-70J | Low Cost Field Programmable Microcontroller Peripherals |
| PSD303-B-70L | Low Cost Field Programmable Microcontroller Peripherals |
| PSD303-B-70M | Low Cost Field Programmable Microcontroller Peripherals |
相關代理商/技術參數 |
參數描述 |
|---|---|
| PSD303-70JM | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Low Cost Field Programmable Microcontroller Peripherals |
| PSD303-70LI | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field-Programmable Peripheral |
| PSD303-70LM | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field-Programmable Peripheral |
| PSD303-70U | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field-Programmable Peripheral |
| PSD303-70UI | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field-Programmable Peripheral |
發布緊急采購，3分鐘左右您將得到回復。