- 您現在的位置：買賣IC網 > PDF目錄376252 > PSD313R-A-90JI (意法半導體) Low Cost Field Programmable Microcontroller Peripherals PDF資料下載
參數資料
| 型號： | PSD313R-A-90JI |
| 廠商： | 意法半導體 |
| 英文描述： | Low Cost Field Programmable Microcontroller Peripherals |
| 中文描述： | 低成本現場可編程微控制器外圍設備 |
| 文件頁數： | 19/85頁 |
| 文件大?。?/td> | 691K |
| 代理商： | PSD313R-A-90JI |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁當前第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁
PSD3XX Famly
16
10.0
I/OPort
Functions
(
cont.)
10.2 Port A (PA0-PA7)
The control registers of Port A are located in CSIOPORT space; see Table 5.
10.2.1 Port A (PA0-PA7) in Multiplexed Address/Data Mode
Each pin of Port A can be individually configured. The following table summarizes what the
control registers (in CSIOPORT space) for Port A do:
NOTE:
1. Default value is the value after reset.
Default
Value
(Note 1)
Register Name
0 Value
1 Value
Port A Pin Register
Sampled logic level
at pin = ‘0’
Pin is configured
as input
Data in DFF = ‘0’
Sampled logic level
at pin = ‘1’
Pin is configured
as output
Data in DFF = ‘1’
X
Port A Direction Register
0
Port A Data Register
0
MCUI/OMode
The default configuration of Port A is MCU I/O. In this mode, every pin can be set (at run-
time) as an input or output by writing to the respective pin’s direction flip-flop (DIR FF,
Figure 5A). As an output, the pin level can be controlled by writing to the respective pin’s
data flip-flop (DFF, Figure 5A). The Pin Register can be read to determine logic level of the
pin. The contents of the Pin Register indicate the true state of the PSD driving the pin
through the DFF or an external source driving the pin. Pins can be configured as CMOS
or open-drain using
ST
’s PSDsoft software. Open-drain pins require external pull-up
resistors.
Latched Address Output Mode
Alternatively, any bit(s) of Port A can be configured to output low-order demultiplexed
address bus bit. The address is provided by the internal PSD address latch, which latches
the address on the trailing edge of ALE/AS. Port A then outputs the desired demultiplexed
address bits. This feature can eliminate the need for an external latch (for example:
74LS373) if you have devices that require low-order latched address bits. Although any pin
of Port A may output an address signal, the pin is position-dependent. In other words, pin
PA0 of Port A may only pass A0, PA1 only A1, and so on.
Track Mode
Track Mode sets the entire port to track the signals on AD0/A0-AD7/A7, depending on
specific address ranges defined by the PAD’s CSADIN, CSADOUT1, and CSADOUT2
signals. This feature lets the user interface the microcontroller to shared external resources
without requiring external buffers and decoders. In Track Mode, Port A effectively operates
as a bi-directional buffer, allowing external MCUs or host processors to access the local
data bus. Keep the following information in mind when setting up Track Mode:
J
The direction is controlled by:
ALE/AS
RD/E or RD/E/DS (DS on non-3X1 devices only)
WR or R/W
PAD outputs CSADOUT1, CSADOUT2, and CSADIN defined in PSDsoft design.
J
When CSADOUT1 and ALE/AS are true, the address on AD0/A0-AD7/A7 is output on
Port A. Note: carefully check the generation of CSADOUT1 to ensure that it is stable
during the ALE/AS pulse.
J
When CSADOUT2 is active and a write operation is performed, the data on the
AD0/A0-AD7/A7 input pins flows out through Port A.
J
When CSADIN is active and a read operation is performed, the data on Port A flows
out through the AD0/A0-AD7/A7 pins.
J
Port A is tri-stated when none of the above conditions exist.
相關PDF資料 |
PDF描述 |
|---|---|
| PSD313R-A-90JM | Current Mode PWM Controller 14-SOIC 0 to 70 |
| PSD313R-B-70J | Low Cost Field Programmable Microcontroller Peripherals |
| PSD301V-90J | Low Cost Field Programmable Microcontroller Peripherals |
| PSD301V-90JI | Low Cost Field Programmable Microcontroller Peripherals |
| PSD301V-90JM | Low Cost Field Programmable Microcontroller Peripherals |
相關代理商/技術參數 |
參數描述 |
|---|---|
| PSD313R-A-90JM | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Low Cost Field Programmable Microcontroller Peripherals |
| PSD313R-B-15J | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Low Cost Field Programmable Microcontroller Peripherals |
| PSD313R-B-70J | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Low Cost Field Programmable Microcontroller Peripherals |
| PSD313RB-70J | 功能描述:SPLD - 簡單可編程邏輯器件 5V 1M 70ns RoHS:否 制造商:Texas Instruments 邏輯系列:TICPAL22V10Z 大電池數量:10 最大工作頻率:66 MHz 延遲時間:25 ns 工作電源電壓:4.75 V to 5.25 V 電源電流:100 uA 最大工作溫度:+ 75 C 最小工作溫度:0 C 安裝風格:Through Hole 封裝 / 箱體:DIP-24 |
| PSD313R-B-90JI | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Low Cost Field Programmable Microcontroller Peripherals |
發布緊急采購，3分鐘左右您將得到回復。