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參數(shù)資料
型號(hào)： PSD313V-70JI
廠商： 意法半導(dǎo)體
英文描述： Low Cost Field Programmable Microcontroller Peripherals
中文描述： 低成本現(xiàn)場(chǎng)可編程微控制器外圍設(shè)備
文件頁(yè)數(shù)： 2/85頁(yè)
文件大小： 691K
代理商： PSD313V-70JI
i
PSD3XX Famly
PSD3XX ZPSD3XX ZPSD3XXV
PSD3XXR ZPSD3XXR ZPSD3XXRV
Low Cost Microcontroller Peripherals
Table of Contents
1
2
3
4
5
6
7
Introduction...........................................................................................................................................................1
Notation ................................................................................................................................................................2
Key Features ........................................................................................................................................................4
PSD3XX Family Feature Summary ......................................................................................................................5
Partial Listing of Microcontrollers Supported ........................................................................................................6
Applications ..........................................................................................................................................................6
ZPSD Background................................................................................................................................................6
7.1
Integrated Power Management
TM
Operation.............................................................................................7
Operating Modes (MCU Configurations) ............................................................................................................10
Programmable Address Decoder (PAD).............................................................................................................12
I/O Port Functions...............................................................................................................................................15
10.1
CSIOPORT Registers..............................................................................................................................15
10.2
Port A (PA0-PA7).....................................................................................................................................16
10.2.1 Port A (PA0-PA7) in Multiplexed Address/Data Mode................................................................16
10.2.2 Port A (PA0-PA7) in Non-Multiplexed Address/Data Mode........................................................17
10.3
Port B (PB0-PB7).....................................................................................................................................18
10.3.1 Port B (PA0-PA7) in Multiplexed Address/Data Mode................................................................18
10.3.2 Port B (PA0-PA7) in Non-Multiplexed Address/Data Mode........................................................19
10.4
Port C (PC0-PC2)....................................................................................................................................20
10.5
ALE/AS Input Pin.....................................................................................................................................20
PSD Memory ......................................................................................................................................................21
11.1
EPROM....................................................................................................................................................21
11.2
SRAM (Optional)......................................................................................................................................21
11.3
Page Register (Optional).........................................................................................................................21
11.4
Programming and Erasure.......................................................................................................................21
Control Signals ...................................................................................................................................................22
12.1
ALE or AS................................................................................................................................................22
12.2
WR or R/W...............................................................................................................................................22
12.3
RD/E/DS (DS option not available on 3X1 devices)................................................................................22
12.4
PSEN or PSEN........................................................................................................................................22
12.5
A19/CSI ...................................................................................................................................................23
12.6
Reset Input ..............................................................................................................................................24
Program/Data Space and the 8031 ....................................................................................................................26
Systems Applications..........................................................................................................................................27
Security Mode.....................................................................................................................................................30
Power Management............................................................................................................................................30
16.1
CSI Input..................................................................................................................................................30
16.2
CMiser Bit................................................................................................................................................30
16.3
Turbo Bit (ZPSD Only).............................................................................................................................31
16.4
Number of Product Terms in the PAD Logic............................................................................................31
16.5
Composite Frequency of the Input Signals to the PAD Logic..................................................................32
16.6
Loading on I/O Pins.................................................................................................................................33
Calculating Power...............................................................................................................................................34
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