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參數(shù)資料
| 型號(hào)： | PSD4235G2V-15JI |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | Fail-Safe Floating Electrode MLCC / FE-CAP / X7R Dielectric; Capacitance [nom]: 0.01uF; Working Voltage (Vdc)[max]: 200V; Capacitance Tolerance: +/-20%; Dielectric: Multilayer Ceramic; Temperature Coefficient: X7R; Lead Style: Surface Mount Chip; Lead Dimensions: 1206; Termination: Tin (Sn) Plated Nickel Barrier; Body Dimensions: 0.126" x 0.063"; Container: Bulk; Features: Fail-Safe Floating Electrode; Unmarked |
| 中文描述： | Flash在系統(tǒng)可編程外設(shè)的16位微控制器 |
| 文件頁數(shù)： | 1/89頁 |
| 文件大?。?/td> | 702K |
| 代理商： | PSD4235G2V-15JI |
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PRELIMINARY DATA
December 2001
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice.
PSD4235G2V
Flash In-System Programmable (ISP) Peripherals
For 16-bit MCUs (3.3V Supply)
FEATURES SUMMARY
PSD provides an integrated solution to 16-bit MCU
based applications that includes configurable
memories, PLD logic and I/O:
I
Dual Bank Flash Memories
– 4 Mbit of Primary Flash Memory (8 uniform
sectors, 32K x 16)
– 256 Kbit Secondary Flash Memory with 4
sectors
– Concurrent operation: read from one memory
while erasing and writing the other
I
64 Kbit SRAM (Battery Backed)
I
PLD with macrocells
– Over 3000 Gates of PLD: CPLD and DPLD
– CPLD with 16 Output Macrocells (OMCs) and
24 Input Macrocells (IMCs)
– DPLD – user defined internal chip select de-
coding
I
Seven l/O Ports with 52 I/O pins
– 52 individually configurable I/O port pins that
can be used for the following functions:
– MCU I/Os
– PLD I/Os
– Latched MCU address output
– Special function l/Os
– l/O ports may be configured as open-drain
outputs
I
In-System Programming (ISP) with JTAG
– Built-in JTAG compliant serial port allows full-
chip In-System Programmability
– Efficient manufacturing allow easy product
testing and programming
– Use low cost FlashLINK cable with PC
I
Page Register
– Internal page register that can be used to ex-
pand the microcontroller address space by a
factor of 256
I
Programmable power management
I
High Endurance:
– 100,000 Erase/Write Cycles of Flash Memory
– 1,000 EraseWrite Cycles of PLD
– 15 Year Data Retention
I
Single Supply Voltage
– 3.3V ±10%
I
Memory Speed
– 90ns Flash memory and SRAM access time
Figure 1. Packages
TQFP80 (U)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| PSD4235G2V-15M | Fail-Safe Floating Electrode MLCC / FE-CAP / X7R Dielectric; Capacitance [nom]: 0.01uF; Working Voltage (Vdc)[max]: 50V; Capacitance Tolerance: +/-20%; Dielectric: Multilayer Ceramic; Temperature Coefficient: X7R; Lead Style: Surface Mount Chip; Lead Dimensions: 1206; Termination: Tin (Sn) Plated Nickel Barrier; Body Dimensions: 0.126" x 0.063"; Container: Bulk; Features: Fail-Safe Floating Electrode; Unmarked |
| PSD4235G2V-15MI | Flash In-System-Programmable Peripherals for 16-Bit MCUs |
| PSD4235G2V-70B81 | Flash In-System-Programmable Peripherals for 16-Bit MCUs |
| PSD4235G2V-70B81I | Flash In-System-Programmable Peripherals for 16-Bit MCUs |
| PSD4235G2V-70J | Tantalum Electrolytic Capacitor; Capacitance:68uF; Capacitance Tolerance:+/- 20 %; Working Voltage, DC:4V; Package/Case:3528-21; Terminal Type:PCB SMT; ESR:0.004ohm; Series:T520 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PSD4235G2V-90U | 功能描述:CPLD - 復(fù)雜可編程邏輯器件 3.3V 4M 90ns RoHS:否 制造商:Lattice 系列: 存儲(chǔ)類型:EEPROM 大電池?cái)?shù)量:128 最大工作頻率:333 MHz 延遲時(shí)間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100 |
| PSD4256G6V-10UI | 功能描述:CPLD - 復(fù)雜可編程邏輯器件 3.3V 8M 100ns RoHS:否 制造商:Lattice 系列: 存儲(chǔ)類型:EEPROM 大電池?cái)?shù)量:128 最大工作頻率:333 MHz 延遲時(shí)間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100 |
| PSD4-36 | 制造商:Tamura Corporation of America 功能描述: |
| PSD-45 | 制造商:MEANWELL 制造商全稱:Mean Well Enterprises Co., Ltd. 功能描述:45W DC-DC Single Output Switching Power Supply |
| PSD-45_11 | 制造商:MEANWELL 制造商全稱:Mean Well Enterprises Co., Ltd. 功能描述:45W DC-DC Single Output Switching Power Supply |
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