欧美成人免费电影,国产欧美一区二区三区精品酒店,精品国产a毛片,色网在线免费观看

參數(shù)資料
型號： PSD8143V90MIT
廠商： 意法半導(dǎo)體
英文描述： Flash In-System Programmable ISP Peripherals For 8-bit MCUs
中文描述： Flash在系統(tǒng)可編程ISP的外設(shè)的8位微控制器
文件頁數(shù)： 28/110頁
文件大小： 1737K
代理商： PSD8143V90MIT
PSD813F2, PSD833F2, PSD834F2, PSD853F2, PSD854F2
28/110
SPECIFIC FEATURES
Flash Memory Sector Protect
Each primary and secondary Flash memory sector
can be separately protected against Program and
Erase cycles. Sector Protection provides addition-
al data security because it disables all Program or
Erase cycles. This mode can be activated through
the JTAG Port or a Device Programmer.
Sector protection can be selected for each sector
using the PSDsoft Express Configuration pro-
gram. This automatically protects selected sectors
when the device is programmed through the JTAG
Port or a Device Programmer. Flash memory sec-
tors can be unprotected to allow updating of their
contents using the JTAG Port or a Device Pro-
grammer. The MCU can read (but cannot change)
the sector protection bits.
Any attempt to program or erase a protected Flash
memory sector is ignored by the device. The Verify
operation results in a READ of the protected data.
This allows a guarantee of the retention of the Pro-
tection status.
The sector protection status can be read by the
MCU through the Flash memory protection and
PSD/EE protection registers (in the CSIOP block).
See Tables
11
and
12
.
Reset Flash
The Reset Flash instruction consists of one
WRITE cycle (see
Table 9., page 21
). It can also
be optionally preceded by the standard two
WRITE decoding cycles (writing AAh to 555h and
55h to AAAh). It must be executed after:
–
Reading the Flash Protection Status or Flash
ID
–
An Error condition has occurred (and the
device has set the Error Flag Bit (DQ5) to '1')
during a Flash memory Program or Erase
cycle.
On the PSD813F2/3/4/5, the Reset Flash instruc-
tion puts the Flash memory back into normal
READ Mode. It may take the Flash memory up to
a few milliseconds to complete the Reset cycle.
The Reset Flash instruction is ignored when it is is-
sued during a Program or Bulk Erase cycle of the
Flash memory. The Reset Flash instruction aborts
any on-going Sector Erase cycle, and returns the
Flash memory to the normal READ Mode within a
few milliseconds.
On the PSD83xF2 or PSD85xF2, the Reset Flash
instruction puts the Flash memory back into nor-
mal READ Mode. If an Error condition has oc-
curred (and the device has set the Error Flag Bit
(DQ5) to '1') the Flash memory is put back into nor-
mal READ Mode within 25
μ
s of the Reset Flash in-
struction having been issued. The Reset Flash
instruction is ignored when it is issued during a
Program or Bulk Erase cycle of the Flash memory.
The Reset Flash instruction aborts any on-going
Sector Erase cycle, and returns the Flash memory
to the normal READ Mode within 25
μ
s.
Reset (RESET) Signal (on the PSD83xF2 and
PSD85xF2)
A pulse on Reset (RESET) aborts any cycle that is
in progress, and resets the Flash memory to the
READ Mode. When the reset occurs during a Pro-
gram or Erase cycle, the Flash memory takes up
to 25
μ
s to return to the READ Mode. It is recom-
mended that the Reset (RESET) pulse (except for
Power On Reset, as described on
RESET TIMING
AND DEVICE STATUS AT RESET, page 67
) be
at least 25
μ
s so that the Flash memory is always
ready for the MCU to fetch the bootstrap instruc-
tions after the Reset cycle is complete.
Table 11. Sector Protection/Security Bit Definition – Flash Protection Register
Note: 1. Bit Definitions:
Sec<i>_Prot
1 = Primary Flash memory or secondary Flash memory Sector <i> is write protected.
Sec<i>_Prot
0 = Primary Flash memory or secondary Flash memory Sector <i> is not write protected.
Table 12. Sector Protection/Security Bit Definition – PSD/EE Protection Register
Note: 1. Bit Definitions:
Sec<i>_Prot
1 = Secondary Flash memory Sector <i> is write protected.
Sec<i>_Prot
0 = Secondary Flash memory Sector <i> is not write protected.
Security_Bit
0 = Security Bit in device has not been set.
1 = Security Bit in device has been set.
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Sec7_Prot
Sec6_Prot
Sec5_Prot
Sec4_Prot
Sec3_Prot
Sec2_Prot
Sec1_Prot
Sec0_Prot
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Security_Bit
not used
not used
not used
Sec3_Prot
Sec2_Prot
Sec1_Prot
Sec0_Prot
相關(guān)PDF資料
PDF描述
PSD8143V90MT High Efficiency, Synchronous, Step-down (Buck) Controller 18-PDIP 0 to 70
PSD814412JIT Flash In-System Programmable ISP Peripherals For 8-bit MCUs
PSD814412JT Flash In-System Programmable ISP Peripherals For 8-bit MCUs
PSD814412MIT Phase Shift Resonant Controller 28-SOIC 0 to 70
PSD814412MT Phase Shift Resonant Controller 28-SOIC 0 to 70
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
PSD833F2-90J 功能描述:CPLD - 復(fù)雜可編程邏輯器件 5.0V 1M 90ns RoHS:否 制造商:Lattice 系列: 存儲類型:EEPROM 大電池數(shù)量:128 最大工作頻率:333 MHz 延遲時間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100
PSD833F2-90JI 功能描述:SPLD - 簡單可編程邏輯器件 5.0V 1M 90ns RoHS:否 制造商:Texas Instruments 邏輯系列:TICPAL22V10Z 大電池數(shù)量:10 最大工作頻率:66 MHz 延遲時間:25 ns 工作電源電壓:4.75 V to 5.25 V 電源電流:100 uA 最大工作溫度:+ 75 C 最小工作溫度:0 C 安裝風(fēng)格:Through Hole 封裝 / 箱體:DIP-24
PSD833F2-90M 功能描述:SPLD - 簡單可編程邏輯器件 5.0V 1M 90ns RoHS:否 制造商:Texas Instruments 邏輯系列:TICPAL22V10Z 大電池數(shù)量:10 最大工作頻率:66 MHz 延遲時間:25 ns 工作電源電壓:4.75 V to 5.25 V 電源電流:100 uA 最大工作溫度:+ 75 C 最小工作溫度:0 C 安裝風(fēng)格:Through Hole 封裝 / 箱體:DIP-24
PSD833F2-90MI 功能描述:CPLD - 復(fù)雜可編程邏輯器件 5.0V 1M 90ns RoHS:否 制造商:Lattice 系列: 存儲類型:EEPROM 大電池數(shù)量:128 最大工作頻率:333 MHz 延遲時間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100
PSD834F2-15M 制造商:STMicroelectronics 功能描述:Flash In-System Programmable Peripherals 52-Pin PQFP
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*
主站蜘蛛池模板： 德清县| 赞皇县| 中卫市| 丹江口市| 柘荣县| 惠安县| 朝阳区| 崇文区| 凌海市| 吐鲁番市| 南宁市| 新营市| 淮滨县| 托里县| 九台市| 三亚市| 凤山市| 西青区| 巴林右旗| 习水县| 乌什县| 怀远县| 宁波市| 峨眉山市| 潜山县| 财经| 上杭县| 上饶市| 宁波市| 宝山区| 介休市| 昆明市| 重庆市| 溆浦县| 郯城县| 双江| 科技| 温州市| 美姑县| 牙克石市| 勐海县|