- 您現在的位置：買賣IC網 > PDF目錄376280 > PSD854415JT (意法半導體) Flash In-System Programmable ISP Peripherals For 8-bit MCUs PDF資料下載
參數資料
| 型號： | PSD854415JT |
| 廠商： | 意法半導體 |
| 英文描述： | Flash In-System Programmable ISP Peripherals For 8-bit MCUs |
| 中文描述： | Flash在系統可編程ISP的外設的8位微控制器 |
| 文件頁數： | 6/110頁 |
| 文件大小： | 1737K |
| 代理商： | PSD854415JT |
第1頁第2頁第3頁第4頁第5頁當前第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁
PSD813F2, PSD833F2, PSD834F2, PSD853F2, PSD854F2
6/110
SUMMARY DESCRIPTION
The PSD8XXFX family of memory systems for mi-
crocontrollers (MCUs) brings In-System-Program-
mability (ISP) to Flash memory and programmable
logic. The result is a simple and flexible solution for
embedded designs. PSD devices combine many
of the peripheral functions found in MCU based
applications.
Table
1
summarizes all the devices in the
PSD834F2, PSD853F2, PSD854F2.
The CPLD in the PSD devices features an opti-
mized macrocell logic architecture. The PSD mac-
rocell was created to address the unique
requirements of embedded system designs. It al-
lows direct connection between the system ad-
dress/data bus, and the internal PSD registers, to
simplify communication between the MCU and
other supporting devices.
The PSD device includes a JTAG Serial Program-
ming interface, to allow In-System Programming
(ISP) of the
entire device
. This feature reduces de-
velopment time, simplifies the manufacturing flow,
and dramatically lowers the cost of field upgrades.
Using ST’s special Fast-JTAG programming, a de-
sign can be rapidly programmed into the PSD in as
little as seven seconds.
The innovative PSD8XXFX family solves key
problems faced by designers when managing dis-
crete Flash memory devices, such as:
–
First-time In-System Programming (ISP)
–
Complex address decoding
–
Simultaneous read and write to the device.
The JTAG Serial Interface block allows In-System
Programming (ISP), and eliminates the need for
an external Boot EPROM, or an external program-
mer. To simplify Flash memory updates, program
execution is performed from a secondary Flash
memory while the primary Flash memory is being
updated. This solution avoids the complicated
hardware and software overhead necessary to im-
plement IAP.
ST makes available a software development tool,
PSDsoft Express, that generates ANSI-C compli-
ant code for use with your target MCU. This code
allows you to manipulate the non-volatile memory
(NVM) within the PSD. Code examples are also
provided for:
–
Flash memory IAP via the UART of the host
MCU
–
Memory paging to execute code across
several PSD memory pages
–
Loading, reading, and manipulation of PSD
macrocells by the MCU.
Table 1. Product Range
Note: 1. All products support: JTAG serial ISP, MCU parallel ISP, ISP Flash memory, ISP CPLD, Security features, Power Management
Unit (PMU), Automatic Power-down (APD)
2. SRAM may be backed up using an external battery.
Part Number
(1)
Primary Flash
Memory
(8 Sectors)
Secondary
Flash Memory
4 Sectors)
SRAM
(2)
I/O Ports
Number of
Macrocells
Serial
ISP
JTAG/
ISC Port
Turbo
Mode
Input
Output
PSD813F2
1 Mbit
256 Kbit
16 Kbit
27
24
16
yes
yes
PSD813F3
1 Mbit
none
16 Kbit
27
24
16
yes
yes
PSD813F4
1 Mbit
256 Kbit
none
27
24
16
yes
yes
PSD813F5
1 Mbit
none
none
27
24
16
yes
yes
PSD833F2
1 Mbit
256 Kbit
64 Kbit
27
24
16
yes
yes
PSD834F2
2 Mbit
256 Kbit
64 Kbit
27
24
16
yes
yes
PSD853F2
1 Mbit
256 Kbit
256 Kbit
27
24
16
yes
yes
PSD854F2
2 Mbit
256 Kbit
256 Kbit
27
24
16
yes
yes
相關PDF資料 |
PDF描述 |
|---|---|
| PSD854415MIT | Flash In-System Programmable ISP Peripherals For 8-bit MCUs |
| PSD854415MT | Flash In-System Programmable ISP Peripherals For 8-bit MCUs |
| PSD854420MIT | Flash In-System Programmable ISP Peripherals For 8-bit MCUs |
| PSD854420MT | Flash In-System Programmable ISP Peripherals For 8-bit MCUs |
| PSD854F2V-15 | Flash In-System Programmable (ISP) Peripherals for 8-bit MCUs, 5V |
相關代理商/技術參數 |
參數描述 |
|---|---|
| PSD854F2-15J | 制造商:STMicroelectronics 功能描述:4556DIE2HR - Trays |
| PSD854F2-70J | 功能描述:CPLD - 復雜可編程邏輯器件 5.0V 2M 70ns RoHS:否 制造商:Lattice 系列: 存儲類型:EEPROM 大電池數量:128 最大工作頻率:333 MHz 延遲時間:2.7 ns 可編程輸入/輸出端數量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100 |
| PSD854F2-70M | 功能描述:CPLD - 復雜可編程邏輯器件 5.0V 2M 70ns RoHS:否 制造商:Lattice 系列: 存儲類型:EEPROM 大電池數量:128 最大工作頻率:333 MHz 延遲時間:2.7 ns 可編程輸入/輸出端數量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100 |
| PSD854F2-90J | 功能描述:CPLD - 復雜可編程邏輯器件 5.0V 2M 90ns RoHS:否 制造商:Lattice 系列: 存儲類型:EEPROM 大電池數量:128 最大工作頻率:333 MHz 延遲時間:2.7 ns 可編程輸入/輸出端數量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100 |
| PSD854F2-90JI | 功能描述:CPLD - 復雜可編程邏輯器件 5.0V 2M 90ns RoHS:否 制造商:Lattice 系列: 存儲類型:EEPROM 大電池數量:128 最大工作頻率:333 MHz 延遲時間:2.7 ns 可編程輸入/輸出端數量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100 |
發布緊急采購，3分鐘左右您將得到回復。