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參數資料
型號: PSD854F2V-70
廠商: 意法半導體
英文描述: Flash In-System Programmable (ISP) Peripherals for 8-bit MCUs, 5V
中文描述: Flash在系統可編程(ISP)的周邊8位MCU,5V的
文件頁數: 1/110頁
文件大小: 1737K
代理商: PSD854F2V-70
1/110
PRELIMINARY DATA
June 2004
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice.
PSD813F2, PSD833F2
PSD834F2, PSD853F2, PSD854F2
Flash In-System Programmable (ISP)
Peripherals for 8-bit MCUs, 5V
FEATURES SUMMARY
FLASH IN-SYSTEM PROGRAMMABLE (ISP)
PERIPHERAL FOR 8-BIT MCUS
DUAL BANK FLASH MEMORIES
UP TO 2 Mbit OF PRIMARY FLASH
MEMORY (8 Uniform Sectors, 32K x8)
UP TO 256 Kbit SECONDARY FLASH
MEMORY (4 Uniform Sectors)
Concurrent operation: READ from one
memory while erasing and writing the
other
UP TO 256 Kbit BATTERY-BACKED SRAM
27 RECONFIGURABLE I/O PORTS
ENHANCED JTAG SERIAL PORT
PLD WITH MACROCELLS
Over 3000 Gates of PLD: CPLD and
DPLD
CPLD with 16 Output Macrocells (OMCs)
and 24 Input Macrocells (IMCs)
DPLD - user defined internal chip select
decoding
27 INDIVIDUALLY CONFIGURABLE I/O
PORT PINS
The can be used for the following functions:
MCU I/Os
PLD I/Os
Latched MCU address output
Special function I/Os.
16 of the I/O ports may be configured as
open-drain outputs.
IN-SYSTEM PROGRAMMING (ISP) WITH
JTAG
Built-in JTAG compliant serial port allows
full-chip In-System Programmability
Efficient manufacturing allow easy
product testing and programming
Use low cost FlashLINK cable with PC
PAGE REGISTER
Internal page register that can be used to
expand the microcontroller address space
by a factor of 256
PROGRAMMABLE POWER MANAGEMENT
Figure 1. Packages
HIGH ENDURANCE:
100,000 Erase/WRITE Cycles of Flash
Memory
1,000 Erase/WRITE Cycles of PLD
15 Year Data Retention
5V±10% SINGLE SUPPLY VOLTAGE
STANDBY CURRENT AS LOW AS 50μA
PQFP52 (M)
PLCC52 (J)
TQFP64 (U)
相關PDF資料
PDF描述
PSD854F2V-90 Flash In-System Programmable (ISP) Peripherals for 8-bit MCUs, 5V
PSD854F3V-15 Flash In-System Programmable (ISP) Peripherals for 8-bit MCUs, 5V
PSD854F3V-20 Flash In-System Programmable (ISP) Peripherals for 8-bit MCUs, 5V
PSD854F3V-70 Flash In-System Programmable (ISP) Peripherals for 8-bit MCUs, 5V
PSD913212JIT Flash In-System Programmable ISP Peripherals For 8-bit MCUs
相關代理商/技術參數
參數描述
PSD854F2V-90J 功能描述:CPLD - 復雜可編程邏輯器件 3.0V 2M 90ns RoHS:否 制造商:Lattice 系列: 存儲類型:EEPROM 大電池數量:128 最大工作頻率:333 MHz 延遲時間:2.7 ns 可編程輸入/輸出端數量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100
PSD854F2V-90M 功能描述:CPLD - 復雜可編程邏輯器件 3.0V 2M 90ns RoHS:否 制造商:Lattice 系列: 存儲類型:EEPROM 大電池數量:128 最大工作頻率:333 MHz 延遲時間:2.7 ns 可編程輸入/輸出端數量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100
PSD-8M-01 制造商:Richco 功能描述:CB SPT REST MNT NAT 8MM SPC
PSD913212JIT 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash In-System Programmable ISP Peripherals For 8-bit MCUs
PSD913212JT 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash In-System Programmable ISP Peripherals For 8-bit MCUs
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