欧美成人免费电影,国产欧美一区二区三区精品酒店,精品国产a毛片,色网在线免费观看

參數資料
型號： PSD854F3V-15
廠商： 意法半導體
英文描述： Flash In-System Programmable (ISP) Peripherals for 8-bit MCUs, 5V
中文描述： Flash在系統可編程（ISP）的周邊8位MCU，5V的
文件頁數： 92/110頁
文件大小： 1737K
代理商： PSD854F3V-15
PSD813F2, PSD833F2, PSD834F2, PSD853F2, PSD854F2
92/110
Table 58. WRITE Timing (3V devices)
Note: 1. Any input used to select an internal PSD function.
2. In multiplexed mode, latched address generated from ADIO delay to address output on any port.
3. WR has the same timing as E, LDS, UDS, WRL, and WRH signals.
4. Assuming data is stable before active WRITE signal.
5. Assuming WRITE is active before data becomes valid.
6. TWHAX2 is the address hold time for DPLD inputs that are used to generate Sector Select signals for internal PSD memory.
Table 59. Program, WRITE and Erase Times (5V devices)
Symbol
Note: 1. Programmed to all zero before erase.
2. The polling status, DQ7, is valid tQ7VQV time units before the data byte, DQ0-DQ7, is valid for reading.
Symbol
Parameter
Conditions
-12
-15
-20
Unit
Min
Max
Min
Max
Min
Max
t
LVLX
ALE or AS Pulse Width
26
26
30
t
AVLX
Address Setup Time
(Note
1
)
9
10
12
ns
t
LXAX
Address Hold Time
(Note
1
)
9
12
14
ns
t
AVWL
Address Valid to Leading
Edge of WR
(Notes
1,3
)
17
20
25
ns
t
SLWL
CS Valid to Leading Edge of WR
(Note
3
)
17
20
25
ns
t
DVWH
WR Data Setup Time
(Note
3
)
45
45
50
ns
t
WHDX
WR Data Hold Time
(Note
3
)
7
8
10
ns
t
WLWH
WR Pulse Width
(Note
3
)
46
48
53
ns
t
WHAX1
Trailing Edge of WR to Address Invalid
(Note
3
)
10
12
17
ns
t
WHAX2
Trailing Edge of WR to DPLD Address
Invalid
(Note
3,6
)
0
0
0
ns
t
WHPV
Trailing Edge of WR to Port Output
Valid Using I/O Port Data Register
(Note
3
)
33
35
40
ns
t
DVMV
Data Valid to Port Output Valid
Using Macrocell Register Preset/Clear
(Notes
3,5
)
70
70
80
ns
t
AVPV
Address Input Valid to Address
Output Delay
(Note
2
)
33
35
40
ns
t
WLMV
WR Valid to Port Output Valid Using
Macrocell Register Preset/Clear
(Notes
3,4
)
70
70
80
ns
Parameter
Min.
Typ.
Max.
Unit
Flash Program
8.5
s
Flash Bulk Erase
1
(pre-programmed)
3
30
s
Flash Bulk Erase (not pre-programmed)
5
s
t
WHQV3
Sector Erase (pre-programmed)
1
30
s
t
WHQV2
Sector Erase (not pre-programmed)
2.2
s
t
WHQV1
Byte Program
14
1200
μs
Program / Erase Cycles (per Sector)
100,000
cycles
t
WHWLO
Sector Erase Time-Out
100
μs
t
Q7VQV
DQ7 Valid to Output (DQ7-DQ0) Valid (Data Polling)
2
30
ns
相關PDF資料
PDF描述
PSD854F3V-20 Flash In-System Programmable (ISP) Peripherals for 8-bit MCUs, 5V
PSD854F3V-70 Flash In-System Programmable (ISP) Peripherals for 8-bit MCUs, 5V
PSD913212JIT Flash In-System Programmable ISP Peripherals For 8-bit MCUs
PSD913212JT Terminal Block; Pitch Spacing:0.197"; Wire Size (AWG):26-12; Mounting Type:PC Board; Leaded Process Compatible:No; Peak Reflow Compatible (260 C):No; Terminal Block Clamp Type:Tension Clamp
PSD913212MT Flash In-System Programmable ISP Peripherals For 8-bit MCUs
相關代理商/技術參數
參數描述
PSD-8M-01 制造商:Richco 功能描述:CB SPT REST MNT NAT 8MM SPC
PSD913212JIT 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash In-System Programmable ISP Peripherals For 8-bit MCUs
PSD913212JT 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash In-System Programmable ISP Peripherals For 8-bit MCUs
PSD913212MIT 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash In-System Programmable ISP Peripherals For 8-bit MCUs
PSD913212MT 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash In-System Programmable ISP Peripherals For 8-bit MCUs
發布緊急采購，3分鐘左右您將得到回復。

采購需求

(若只采購一條型號，填寫一行即可)

發布成功！您可以繼續發布采購。也可以進入我的后臺，查看報價

發布成功！您可以繼續發布采購。也可以進入我的后臺，查看報價

*型號 *數量 廠商 批號 封裝
添加更多采購

我的聯系方式

*
*
*
主站蜘蛛池模板： 永济市| 海丰县| 丹巴县| 晴隆县| 建平县| 名山县| 皋兰县| 保德县| 东台市| 兴化市| 清镇市| 平武县| 本溪| 宜都市| 武夷山市| 客服| 昔阳县| 罗平县| 江川县| 通州区| 龙泉市| 枣强县| 博乐市| 沭阳县| 门头沟区| 梅州市| 林西县| 芜湖县| 崇明县| 张家港市| 丹寨县| 杨浦区| 乡宁县| 亳州市| 宣城市| 阜城县| 永登县| 明光市| 从江县| 淮滨县| 日土县|