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參數(shù)資料
| 型號： | PSD9132V20MT |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | PECL To TTL Translator; Package: SOEIAJ-16; No of Pins: 16; Container: Tape and Reel; Qty per Container: 2000 |
| 中文描述： | Flash在系統(tǒng)可編程ISP的外設(shè)的8位微控制器 |
| 文件頁數(shù)： | 55/110頁 |
| 文件大小： | 1737K |
| 代理商： | PSD9132V20MT |
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PSD813F2, PSD833F2, PSD834F2, PSD853F2, PSD854F2
Address In Mode
For MCUs that have more than 16 address sig-
nals, the higher addresses can be connected to
Port A, B, C, and D. The address input can be
latched in the Input Macrocell (IMC) by Address
Strobe (ALE/AS, PD0). Any input that is included
in the DPLD equations for the SRAM, or primary or
secondary Flash memory is considered to be an
address input.
Data Port Mode
Port A can be used as a data bus port for a MCU
with a non-multiplexed address/data bus. The
Data Port is connected to the data bus of the MCU.
The general I/O functions are disabled in Port A if
the port is configured as a Data Port.
Peripheral I/O Mode
Peripheral I/O mode can be used to interface with
external peripherals. In this mode, all of Port A
serves as a tri-state, bi-directional data buffer for
the MCU. Peripheral I/O Mode is enabled by set-
ting Bit 7 of the VM Register to a ’1.’ Figure
27
shows how Port A acts as a bi-directional buffer for
the MCU data bus if Peripheral I/O Mode is en-
abled. An equation for PSEL0 and/or PSEL1 must
be written in PSDabel. The buffer is tri-stated
when PSEL0 or PSEL1 is not active.
Figure 27. Peripheral I/O Mode
RD
PSEL0
PSEL1
PSEL
VM REGISTER BIT 7
WR
PA0-PA7
D0-D7
DATA BUS
AI02886
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| PSD9132V70MIT | BBG ECL TRNSLATR ECL/TTL; Package: SOEIAJ-16; No of Pins: 16; Container: Tape and Reel; Qty per Container: 2000 |
| PSD9132V70MT | BBG ECL TRNSLATR ECL/TTL; Package: SOEIAJ-16; No of Pins: 16; Container: Rail; Qty per Container: 50 |
| PSD9132V90MIT | Flash In-System Programmable ISP Peripherals For 8-bit MCUs |
| PSD9132V90MT | PECL To TTL Translator; Package: PDIP-16; No of Pins: 16; Container: Rail; Qty per Container: 25 |
| PSD913315JIT | Flash In-System Programmable ISP Peripherals For 8-bit MCUs |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PSD9132V70JIT | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash In-System Programmable ISP Peripherals For 8-bit MCUs |
| PSD9132V70JT | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash In-System Programmable ISP Peripherals For 8-bit MCUs |
| PSD9132V70MIT | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash In-System Programmable ISP Peripherals For 8-bit MCUs |
| PSD9132V70MT | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash In-System Programmable ISP Peripherals For 8-bit MCUs |
| PSD9132V90JIT | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash In-System Programmable ISP Peripherals For 8-bit MCUs |
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