欧美成人免费电影,国产欧美一区二区三区精品酒店,精品国产a毛片,色网在线免费观看

參數資料
型號： PSD913412MIT
廠商： 意法半導體
英文描述： 9-Bit ECL-TTL Translator; Package: 28 LEAD PLCC; No of Pins: 28; Container: Tape and Reel; Qty per Container: 500
中文描述： Flash在系統可編程ISP的外設的8位微控制器
文件頁數： 57/110頁
文件大小： 1737K
代理商： PSD913412MIT
57/110
PSD813F2, PSD833F2, PSD834F2, PSD853F2, PSD854F2
Table 26. Drive Register Pin Assignment
Note: 1. NA = Not Applicable.
Port Data Registers
The Port Data Registers, shown in Table
27
, are
used by the MCU to write data to or read data from
the ports. Table
27
shows the register name, the
ports having each register type, and MCU access
for each register type. The registers are described
below.
Data In
Port pins are connected directly to the Data In buff-
er. In MCU I/O input mode, the pin input is read
through the Data In buffer.
Data Out Register
Stores output data written by the MCU in the MCU
I/O output mode. The contents of the Register are
driven out to the pins if the Direction Register or
the output enable product term is set to ’1.’ The
contents of the register can also be read back by
the MCU.
Output Macrocells (OMC).
The CPLD Output
Macrocells (OMC) occupy a location in the MCU’s
address space. The MCU can read the output of
the Output Macrocells (OMC). If the OMC Mask
Register bits are not set, writing to the macrocell
loads data to the macrocell flip-flops. See the sec-
tion entitled
PLDS, page 33
.
OMC Mask Register
Each OMC Mask Register bit corresponds to an
Output Macrocell (OMC) flip-flop. When the OMC
Mask Register bit is set to a 1, loading data into the
Output Macrocell (OMC) flip-flop is blocked. The
default value is 0 or unblocked.
Table 27. Port Data Registers
Drive
Register
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Port A
Open
Drain
Open
Drain
Open
Drain
Open
Drain
Slew
Rate
Slew
Rate
Slew
Rate
Slew
Rate
Port B
Open
Drain
Open
Drain
Open
Drain
Open
Drain
Slew
Rate
Slew
Rate
Slew
Rate
Slew
Rate
Port C
Open
Drain
Open
Drain
Open
Drain
Open
Drain
Open
Drain
Open
Drain
Open
Drain
Open
Drain
Port D
NA
1
NA
1
NA
1
NA
1
NA
1
Slew
Rate
Slew
Rate
Slew
Rate
Register Name
Port
MCU Access
Data In
A,B,C,D
READ – input on pin
Data Out
A,B,C,D
WRITE/READ
Output Macrocell
A,B,C
READ – outputs of macrocells
WRITE – loading macrocells flip-flop
Mask Macrocell
A,B,C
WRITE/READ – prevents loading into a given
macrocell
Input Macrocell
A,B,C
READ – outputs of the Input Macrocells
Enable Out
A,B,C
READ – the output enable control of the port driver
相關PDF資料
PDF描述
PSD913412MT Flash In-System Programmable ISP Peripherals For 8-bit MCUs
PSD913415JIT BBG ECL TRNSLATR 9BIT; Package: 28 LEAD PLCC; No of Pins: 28; Container: Rail; Qty per Container: 37
PSD913415JT 9-Bit Latch/TTL-ECL Translator; Package: 28 LEAD PLCC; No of Pins: 28; Container: Tape and Reel; Qty per Container: 500
PSD913415MIT BBG ECL TRNSLATR 9BIT; Package: 28 LEAD PLCC; No of Pins: 28; Container: Tape and Reel; Qty per Container: 500
PSD913415MT Flash In-System Programmable ISP Peripherals For 8-bit MCUs
相關代理商/技術參數
參數描述
PSD913412MT 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash In-System Programmable ISP Peripherals For 8-bit MCUs
PSD913415JIT 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash In-System Programmable ISP Peripherals For 8-bit MCUs
PSD913415JT 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash In-System Programmable ISP Peripherals For 8-bit MCUs
PSD913415MIT 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash In-System Programmable ISP Peripherals For 8-bit MCUs
PSD913415MT 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash In-System Programmable ISP Peripherals For 8-bit MCUs
發布緊急采購，3分鐘左右您將得到回復。

采購需求

(若只采購一條型號，填寫一行即可)

發布成功！您可以繼續發布采購。也可以進入我的后臺，查看報價

發布成功！您可以繼續發布采購。也可以進入我的后臺，查看報價

*型號 *數量 廠商 批號 封裝
添加更多采購

我的聯系方式

*
*
*
主站蜘蛛池模板： 光泽县| 阿合奇县| 门头沟区| 海伦市| 浮山县| 永嘉县| 汝阳县| 贺州市| 宁南县| 肥西县| 巴林左旗| 湖北省| 夏河县| 江达县| 巴中市| 曲靖市| 凤山县| 海城市| 精河县| 深圳市| 淮北市| 卓尼县| 肃北| 崇义县| 连平县| 广元市| 青海省| 台中县| 马龙县| 南投市| 汉中市| 息烽县| 张家界市| 仙桃市| 公主岭市| 隆子县| 浑源县| 罗源县| 蓬溪县| 固阳县| 炎陵县|