欧美成人免费电影,国产欧美一区二区三区精品酒店,精品国产a毛片,色网在线免费观看

參數資料
型號: PSD914270MT
廠商: 意法半導體
英文描述: Low-Power BiCMOS Current-Mode PWM 8-TSSOP -40 to 85
中文描述: Flash在系統可編程ISP的外設的8位微控制器
文件頁數: 57/110頁
文件大小: 1737K
代理商: PSD914270MT
57/110
PSD813F2, PSD833F2, PSD834F2, PSD853F2, PSD854F2
Table 26. Drive Register Pin Assignment
Note: 1. NA = Not Applicable.
Port Data Registers
The Port Data Registers, shown in Table
27
, are
used by the MCU to write data to or read data from
the ports. Table
27
shows the register name, the
ports having each register type, and MCU access
for each register type. The registers are described
below.
Data In
Port pins are connected directly to the Data In buff-
er. In MCU I/O input mode, the pin input is read
through the Data In buffer.
Data Out Register
Stores output data written by the MCU in the MCU
I/O output mode. The contents of the Register are
driven out to the pins if the Direction Register or
the output enable product term is set to ’1.’ The
contents of the register can also be read back by
the MCU.
Output Macrocells (OMC).
The CPLD Output
Macrocells (OMC) occupy a location in the MCU’s
address space. The MCU can read the output of
the Output Macrocells (OMC). If the OMC Mask
Register bits are not set, writing to the macrocell
loads data to the macrocell flip-flops. See the sec-
tion entitled
PLDS, page 33
.
OMC Mask Register
Each OMC Mask Register bit corresponds to an
Output Macrocell (OMC) flip-flop. When the OMC
Mask Register bit is set to a 1, loading data into the
Output Macrocell (OMC) flip-flop is blocked. The
default value is 0 or unblocked.
Table 27. Port Data Registers
Drive
Register
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Port A
Open
Drain
Open
Drain
Open
Drain
Open
Drain
Slew
Rate
Slew
Rate
Slew
Rate
Slew
Rate
Port B
Open
Drain
Open
Drain
Open
Drain
Open
Drain
Slew
Rate
Slew
Rate
Slew
Rate
Slew
Rate
Port C
Open
Drain
Open
Drain
Open
Drain
Open
Drain
Open
Drain
Open
Drain
Open
Drain
Open
Drain
Port D
NA
1
NA
1
NA
1
NA
1
NA
1
Slew
Rate
Slew
Rate
Slew
Rate
Register Name
Port
MCU Access
Data In
A,B,C,D
READ – input on pin
Data Out
A,B,C,D
WRITE/READ
Output Macrocell
A,B,C
READ – outputs of macrocells
WRITE – loading macrocells flip-flop
Mask Macrocell
A,B,C
WRITE/READ – prevents loading into a given
macrocell
Input Macrocell
A,B,C
READ – outputs of the Input Macrocells
Enable Out
A,B,C
READ – the output enable control of the port driver
相關PDF資料
PDF描述
PSD914290JIT Flash In-System Programmable ISP Peripherals For 8-bit MCUs
PSD914290JT Flash In-System Programmable ISP Peripherals For 8-bit MCUs
PSD914290MIT Flash In-System Programmable ISP Peripherals For 8-bit MCUs
PSD914290MT Flash In-System Programmable ISP Peripherals For 8-bit MCUs
PSD9142V15JT Enhanced Product Low-Power Bicmos Current-Mode Pwm 8-SOIC -40 to 125
相關代理商/技術參數
參數描述
PSD934F2-15J 功能描述:SPLD - 簡單可編程邏輯器件 5V 2M 150ns RoHS:否 制造商:Texas Instruments 邏輯系列:TICPAL22V10Z 大電池數量:10 最大工作頻率:66 MHz 延遲時間:25 ns 工作電源電壓:4.75 V to 5.25 V 電源電流:100 uA 最大工作溫度:+ 75 C 最小工作溫度:0 C 安裝風格:Through Hole 封裝 / 箱體:DIP-24
PSD934F290J 制造商:WSI 功能描述:
PSD934F2-90J 功能描述:SPLD - 簡單可編程邏輯器件 PLCC-52 5V 2M 90NS RoHS:否 制造商:Texas Instruments 邏輯系列:TICPAL22V10Z 大電池數量:10 最大工作頻率:66 MHz 延遲時間:25 ns 工作電源電壓:4.75 V to 5.25 V 電源電流:100 uA 最大工作溫度:+ 75 C 最小工作溫度:0 C 安裝風格:Through Hole 封裝 / 箱體:DIP-24
PSD934F2-90M 功能描述:SPLD - 簡單可編程邏輯器件 5V 2M 90ns RoHS:否 制造商:Texas Instruments 邏輯系列:TICPAL22V10Z 大電池數量:10 最大工作頻率:66 MHz 延遲時間:25 ns 工作電源電壓:4.75 V to 5.25 V 電源電流:100 uA 最大工作溫度:+ 75 C 最小工作溫度:0 C 安裝風格:Through Hole 封裝 / 箱體:DIP-24
PSD934F2V-15J 功能描述:SPLD - 簡單可編程邏輯器件 3.3V 2M 150ns RoHS:否 制造商:Texas Instruments 邏輯系列:TICPAL22V10Z 大電池數量:10 最大工作頻率:66 MHz 延遲時間:25 ns 工作電源電壓:4.75 V to 5.25 V 電源電流:100 uA 最大工作溫度:+ 75 C 最小工作溫度:0 C 安裝風格:Through Hole 封裝 / 箱體:DIP-24
主站蜘蛛池模板: 岫岩| 襄樊市| 怀集县| 霍州市| 舟曲县| 页游| 福泉市| 南宫市| 三门峡市| 永寿县| 湟中县| 武隆县| 连江县| 北辰区| 志丹县| 淮安市| 武宣县| 上饶市| 新安县| 丰台区| 万宁市| 右玉县| 万山特区| 永吉县| 新安县| 班玛县| 武乡县| 义马市| 康马县| 敦煌市| 大城县| 临安市| 聂荣县| 延川县| 华阴市| 永川市| 华宁县| 雷波县| 嘉禾县| 蒙城县| 诸暨市|