欧美成人免费电影,国产欧美一区二区三区精品酒店,精品国产a毛片,色网在线免费观看

參數資料
型號: PSD9332V15MT
廠商: 意法半導體
英文描述: High Speed CMOS Logic Quad 2-Input NAND Gates with Open Drain 14-SOIC -55 to 125
中文描述: Flash在系統可編程ISP的外設的8位微控制器
文件頁數: 40/110頁
文件大小: 1737K
代理商: PSD9332V15MT
PSD813F2, PSD833F2, PSD834F2, PSD853F2, PSD854F2
40/110
Input Macrocells (IMC)
The CPLD has 24 Input Macrocells (IMC), one for
each pin on Ports A, B, and C. The architecture of
the Input Macrocells (IMC) is shown in
Figure
17., page 41
. The Input Macrocells (IMC) are indi-
vidually configurable, and can be used as a latch,
register, or to pass incoming Port signals prior to
driving them onto the PLD input bus. The outputs
of the Input Macrocells (IMC) can be read by the
MCU through the internal data bus.
The enable for the latch and clock for the register
are driven by a multiplexer whose inputs are a
product term from the CPLD AND Array or the
MCU Address Strobe (ALE/AS). Each product
term output is used to latch or clock four Input
Macrocells (IMC). Port inputs 3-0 can be con-
trolled by one product term and 7-4 by another.
Configurations for the Input Macrocells (IMC) are
specified by equations written in PSDabel (see Ap-
plication Note
AN1171
). Outputs of the Input Mac-
rocells (IMC) can be read by the MCU via the IMC
buffer.
See
the
section
PORTS, page 51
.
entitled
I/O
Input Macrocells (IMC) can use Address Strobe
(ALE/AS, PD0) to latch address bits higher than
A15. Any latched addresses are routed to the
PLDs as inputs.
Input Macrocells (IMC) are particularly useful with
handshaking communication applications where
two processors pass data back and forth through
a common mailbox.
Figure 18., page 42
shows a
typical configuration where the Master MCU writes
to the Port A Data Out Register. This, in turn, can
be read by the Slave MCU via the activation of the
“Slave-Read” output enable product term.
The Slave can also write to the Port A Input Mac-
rocells (IMC) and the Master can then read the In-
put Macrocells (IMC) directly.
Note that the “Slave-Read” and “Slave-Wr” signals
are product terms that are derived from the Slave
MCU inputs Read Strobe (RD, CNTL1), Write
Strobe (WR, CNTL0), and Slave_CS.
相關PDF資料
PDF描述
PSD9332V20JT High Speed CMOS Logic Quad 2-Input NAND Gates with Open Drain 14-SOIC -55 to 125
PSD853212JIT Flash In-System Programmable ISP Peripherals For 8-bit MCUs
PSD853212JT Flash In-System Programmable ISP Peripherals For 8-bit MCUs
PSD853212MT High Speed CMOS Logic Quad 2-Input AND Gates 14-PDIP -55 to 125
PSD853220JIT Flash In-System Programmable ISP Peripherals For 8-bit MCUs
相關代理商/技術參數
參數描述
PSD934F2-15J 功能描述:SPLD - 簡單可編程邏輯器件 5V 2M 150ns RoHS:否 制造商:Texas Instruments 邏輯系列:TICPAL22V10Z 大電池數量:10 最大工作頻率:66 MHz 延遲時間:25 ns 工作電源電壓:4.75 V to 5.25 V 電源電流:100 uA 最大工作溫度:+ 75 C 最小工作溫度:0 C 安裝風格:Through Hole 封裝 / 箱體:DIP-24
PSD934F290J 制造商:WSI 功能描述:
PSD934F2-90J 功能描述:SPLD - 簡單可編程邏輯器件 PLCC-52 5V 2M 90NS RoHS:否 制造商:Texas Instruments 邏輯系列:TICPAL22V10Z 大電池數量:10 最大工作頻率:66 MHz 延遲時間:25 ns 工作電源電壓:4.75 V to 5.25 V 電源電流:100 uA 最大工作溫度:+ 75 C 最小工作溫度:0 C 安裝風格:Through Hole 封裝 / 箱體:DIP-24
PSD934F2-90M 功能描述:SPLD - 簡單可編程邏輯器件 5V 2M 90ns RoHS:否 制造商:Texas Instruments 邏輯系列:TICPAL22V10Z 大電池數量:10 最大工作頻率:66 MHz 延遲時間:25 ns 工作電源電壓:4.75 V to 5.25 V 電源電流:100 uA 最大工作溫度:+ 75 C 最小工作溫度:0 C 安裝風格:Through Hole 封裝 / 箱體:DIP-24
PSD934F2V-15J 功能描述:SPLD - 簡單可編程邏輯器件 3.3V 2M 150ns RoHS:否 制造商:Texas Instruments 邏輯系列:TICPAL22V10Z 大電池數量:10 最大工作頻率:66 MHz 延遲時間:25 ns 工作電源電壓:4.75 V to 5.25 V 電源電流:100 uA 最大工作溫度:+ 75 C 最小工作溫度:0 C 安裝風格:Through Hole 封裝 / 箱體:DIP-24
主站蜘蛛池模板: 瑞安市| 高阳县| 油尖旺区| 碌曲县| 凤阳县| 定襄县| 汉源县| 新邵县| 本溪市| 广宗县| 特克斯县| 阿克苏市| 肃北| 九龙县| 青阳县| 固安县| 威信县| 唐河县| 永年县| 桂阳县| 石河子市| 汨罗市| 儋州市| 南投市| 霍林郭勒市| 瑞金市| 来凤县| 固安县| 呼和浩特市| 海口市| 合山市| 确山县| 枣庄市| 仁寿县| 聊城市| 延吉市| 离岛区| 拜城县| 龙山县| 龙泉市| 嘉荫县|