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參數資料
| 型號： | Q62702-C688-V3 |
| 廠商： | SIEMENS AG |
| 英文描述： | NPN Silicon Transistors |
| 中文描述： | NPN硅晶體管 |
| 文件頁數： | 2/11頁 |
| 文件大?。?/td> | 101K |
| 代理商： | Q62702-C688-V3 |
BGC420
High Frequency Products
2
Edition A13, 05/99
Maximum Ratings
Parameter
Device current
Device voltage
Total power dissipation, T
s
≤
110°C
1)
Control voltage
Input Current for pin 1
Symbol
I
CC
Vcc
P
tot
Vc
Ir
Unit
mA
V
mW
V
μ
A
15
4.5
68
Vcc+0.5
380
Junction temperature
Ambient temperature range
Storage temperature range
T
j
T
A
T
stg
150
°
C
°
C
°
C
-65...+150
-65...+150
Thermal Resistance
Junction-soldering point
1)
1)TS is measured on the Ground lead at the soldering point to the pcb
.
R
th JS
≤
270
K/W
Electrical Specifications (Measured in Test Fixture applying the circuit specified in Figure 1
with Rx=82
W
),
Tc=25°C, Vcc=3V, I
CC
￡
7mA unless noted
Symbol
Gp
Parameter
Power Gain (
￥
S
21
￥
2
)
Unit
dB
Min
17.5
14.5
Typ
19
16
1.3
1.5
1
1
15
15
7
9
4
7
3.7
2.5
<10
35
-60
Max
f=900MHz
f=1.8GHz
f=900MHz
f=1.8GHz
NF
Noise Figure (in 50
W
System)
dB
1.5
1.7
P
-1dB
Output Power at 1dB Gain Compression f=900MHz
(in 50
W
System)
Third Order Intercept Point
(Output,
G
Opt
)
Input Return Loss
f=1.8GHz
f=900MHz
f=1.8GHz
f=900MHz
f=1.8GHz
f=900MHz
f=1.8GHz
dBm
IP
3
dBm
RL
in
dB
RL
out
Output Return Loss
dB
t
on
t
off
I
leak
I
VcOn
I
VcOff
V
cmin
V
cmax
2)
A positive sign denotes a current flowing form the Pin into the external circuit.
On Switching Time
3)
Off Switching Time
3)
Leakage Current In Sleep Mode
Controll Pin (Vc) Current in Active Mode
2)
Controll Pin (Vc) Current in Sleep Mode
2)
Minimum Voltage at Vc for Sleep Mode
Maximum Voltage at Vc for Active Mode
μs
μs
μA
μA
nA
V
V
V
cc
- 0.3V
0V+0.3V
3)
This values are valid for C2=1nF, C3=100pF and 220pF Coupling capacitors at RFin and RFout.
相關PDF資料 |
PDF描述 |
|---|---|
| Q62702-C689 | NPN Silicon Transistors |
| Q62702-C689-V1 | NPN Silicon Transistors |
| Q62702-C689-V2 | Ceramic Chip Capacitors / MIL-PRF-55681; Capacitance [nom]: 680pF; Working Voltage (Vdc)[max]: 50V; Capacitance Tolerance: +/-5%; Dielectric: Multilayer Ceramic; Temperature Coefficient: C0G (NP0); Lead Style: Surface Mount Chip; Lead Dimensions: 0805; Termination: 100% Tin (Sn); Body Dimensions: 0.080" x 0.050" x 0.055"; Container: Bag; Features: MIL-PRF-55681: S Failure Rate |
| Q62702-C689-V3 | NPN Silicon Transistors |
| Q62702-C689-V4 | NPN Silicon Transistors |
相關代理商/技術參數 |
參數描述 |
|---|---|
| Q62702-C689 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:NPN Silicon Transistors |
| Q62702-C689-V1 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:NPN Silicon Transistors |
| Q62702-C689-V2 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:NPN Silicon Transistors |
| Q62702-C689-V3 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:NPN Silicon Transistors |
| Q62702-C689-V4 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:NPN Silicon Transistors |
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