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參數資料
型號: Q67040-S4009-A2
廠商: SIEMENS AG
英文描述: SIPMOS Power Transistor (N channel Enhancement mode Avalanche-rated dv/dt rated 175∑C operating temperature)
中文描述: SIPMOS功率晶體管(N通道增強模式雪崩額定dv / dt的額定工作溫度175ΣC)
文件頁數: 3/8頁
文件大小: 121K
代理商: Q67040-S4009-A2
Semiconductor Group
3
30/Jan/1998
BUZ 103 S
SPP31N05
Electrical Characteristics,
at
T
j
= 25°C, unless otherwise specified
Parameter
Symbol
Values
Unit
min.
typ.
max.
Dynamic Characteristics
Transconductance
V
DS
2
*
I
D *
R
DS(on)max,
I
D
= 22 A
Input capacitance
g
fs
10
-
-
S
V
GS
= 0 V,
V
DS
= 25 V,
f
= 1 MHz
Output capacitance
C
iss
-
720
900
pF
V
GS
= 0 V,
V
DS
= 25 V,
f
= 1 MHz
Reverse transfer capacitance
C
oss
-
230
300
V
GS
= 0 V,
V
DS
= 25 V,
f
= 1 MHz
Turn-on delay time
C
rss
-
125
160
V
DD
= 30 V,
V
GS
= 10 V,
I
D
= 31 A
R
G
= 13
Rise time
t
d(on)
-
10
15
ns
V
DD
= 30 V,
V
GS
= 10 V,
I
D
= 31 A
R
G
= 13
Turn-off delay time
t
r
-
25
40
V
DD
= 30 V,
V
GS
= 10 V,
I
D
= 31 A
R
G
= 13
Fall time
t
d(off)
-
25
40
V
DD
= 30 V,
V
GS
= 10 V,
I
D
= 31 A
R
G
= 13
Gate charge at threshold
t
f
-
20
30
V
DD
= 40 V,
I
D
= 0.1 A,
V
GS
=0 to 1 V
Gate charge at 7.0 V
Q
g(th)
-
0.7
1
nC
V
DD
= 40 V,
I
D
= 31 A,
V
GS
=0 to 7 V
Gate charge total
Q
g(7)
-
20
30
V
DD
= 40 V,
I
D
= 31 A,
V
GS
=0 to 10 V
Gate plateau voltage
Q
g(total)
-
25
40
V
DD
= 40 V,
I
D
= 31 A
V
(plateau)
-
5.9
-
V
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參數描述
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