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參數資料
| 型號： | Q67060-S6108-A2 |
| 廠商： | INFINEON TECHNOLOGIES AG |
| 英文描述： | High Speed CMOS Logic Dual 4-Input NOR Gates 14-SOIC -55 to 125 |
| 中文描述： | 智能阻抗高側電源開關 |
| 文件頁數： | 2/14頁 |
| 文件大小： | 327K |
| 代理商： | Q67060-S6108-A2 |
BTS426L1
Semiconductor Group
2
2003-Oct-01
Pin
1
2
3
Symbol
GND
IN
Vbb
-
I
+
Function
Logic ground
Input, activates the power switch in case of logical high signal
Positive power supply voltage,
the tab is shorted to this pin
Diagnostic feedback, low on failure
Output to the load
4
5
ST
OUT
(Load, L)
S
O
Maximum Ratings
at
T
j
= 25 °C unless otherwise specified
Parameter
Supply voltage (overvoltage protection see page 3)
Supply voltage for full short circuit protection
T
j Start
=-40 ...+150°C
Load dump protection
2
)
V
LoadDump
=
U
A
+
V
s
,
U
A
= 13.5 V
R
I
3
)
= 2
,
R
L
= 1.7
,
t
d
= 200 ms, IN= low or high
Load current (Short circuit current, see page 4)
Operating temperature range
Storage temperature range
Power dissipation (DC), T
C
≤
25 °C
Inductive load switch-off energy dissipation, single pulse
V
bb
=
12V,
T
j,start
=
150°C,
T
C
=
150°C const.
Electrostatic discharge capability (ESD)
(Human Body Model)
acc. MIL-STD883D, method 3015.7 and ESD assn. std. S5.1-1993
Input voltage (DC)
Current through input pin (DC)
Current through status pin (DC)
see internal circuit diagrams page 6
Symbol
V
bb
V
bb
Values
Unit
43
34
V
V
V
Load dump4
)
60
V
I
L
T
j
T
stg
P
tot
E
AS
V
ESD
self-limited
-40 ...+150
-55 ...+150
A
°C
75
W
I
L
=
7.0
A, Z
L
=
24
mH, 0
:
0.74
1.0
2.0
J
IN:
all other pins:
kV
V
IN
I
IN
I
ST
-10 ... +16
V
±
2.0
±
5.0
mA
Thermal Characteristics
Parameter and Conditions
Thermal resistance
Symbol
R
thJC
R
thJA
Values
typ
Unit
min
--
--
max
1.67
75
chip - case:
junction - ambient (free air):
SMD version, device on PCB
5)
:
--
--
34
K/W
2
)
Supply voltages higher than V
bb(AZ)
require an external current limit for the GND and status pins, e.g. with a 150
resistor in the
GND connection and a 15 k
resistor in series with the status pin. A resistor for the protection of the input is integrated.
3)
R
I
= internal resistance of the load dump test pulse generator
4)
V
Load dump
is setup without the DUT connected to the generator per ISO 7637-1 and DIN 40839
5
)
Device on 50mm*50mm*1.5mm epoxy PCB FR4 with 6cm
2
(one layer, 70
μ
m thick) copper area for Vbb connection. PCB is vertical
without blown air.
相關PDF資料 |
PDF描述 |
|---|---|
| Q67060-S6108-A3 | High Speed CMOS Logic Dual 4-Input NOR Gates 14-SOIC -55 to 125 |
| Q67060-S6108-A4 | High Speed CMOS Logic Dual 4-Input NOR Gates 14-SOIC -55 to 125 |
| Q67060-S6109-A2 | High Speed CMOS Logic Dual 4-Input NOR Gates 14-SOIC -55 to 125 |
| Q67060-S6109-A3 | High Speed CMOS Logic Dual 4-Input NOR Gates 14-SOIC -55 to 125 |
| Q67060-S6109-A4 | High Speed CMOS Logic Dual 4-Input NOR Gates 14-SOIC -55 to 125 |
相關代理商/技術參數 |
參數描述 |
|---|---|
| Q67060-S6108-A3 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:Smart Highside Power Switch |
| Q67060-S6108-A4 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:Smart Highside Power Switch |
| Q67060-S6109-A2 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:Smart Highside Power Switch |
| Q67060-S6109-A3 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:Smart Highside Power Switch |
| Q67060-S6109-A4 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:Smart Highside Power Switch |
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