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參數資料
型號: Q67060-S6302-A3
廠商: SIEMENS AG
英文描述: High Speed CMOS Logic Dual 4-Stage Static Shift Registers 16-PDIP -55 to 125
中文描述: 智能雙通道阻抗高側電源開關
文件頁數: 5/14頁
文件大小: 191K
代理商: Q67060-S6302-A3
BTS 611 L1
Parameter and Conditions,
each channel
at T
j
= 25 °C, V
bb
= 12 V unless otherwise specified
Symbol
Values
typ
Unit
min
max
Semiconductor Group
5
Protection Functions
Initial peak short circuit current limit (pin 4 to 1
or 7)
I
L(SCp)
T
j
=-40°C:
T
j
=25°C:
T
j
=+150°C:
5.5
4.5
2.5
9.5
7.5
4.5
13
11
7
A
Repetitive short circuit shutdown current limit
T
j
= T
jt
(see timing diagrams, page 11)
Output clamp (inductive load switch off)
at V
OUT
= V
bb
- V
ON(CL)
Thermal overload trip temperature
Thermal hysteresis
Reverse battery (pin 4 to 2)
9
)
Reverse battery voltage drop
(V
out
> V
bb
)
I
L
= -1.8 A, each channel
I
L(SCr)
--
4
--
A
I
L
= 40 mA:
V
ON(CL)
T
jt
T
jt
-V
bb
41
47
--
10
--
53
--
--
32
V
150
°C
K
V
--
--
T
j
=150 °C:
-V
ON(rev)
--
610
--
mV
Diagnostic Characteristics
Open load detection current
(on-condition)
Open load detection voltage
10
) (off-condition)
T
j
=-40 °C
:
T
j
=25 ..150°C:
I
L (OL)
10
10
--
--
3
200
150
mA
T
j
=-40..150°C:
V
OUT(OL)
2
4
V
Internal output pull down
(pin 1
or
7 to 2), V
OUT
=5 V, T
j
=-40..150°C
R
O
4
10
30
k
9
)
Requires 150
resistor in GND connection. The reverse load current through the intrinsic drain-source
diode has to be limited by the connected load. Note that the power dissipation is higher compared to normal
operating conditions due to the voltage drop across the intrinsic drain-source diode. The temperature
protection is not active during reverse current operation! Input and Status currents have to be limited (see
max. ratings page 2 and circuit page 8).
10)
External pull up resistor required for open load detection in off state.
相關PDF資料
PDF描述
Q67060-S6302-A4 High Speed CMOS Logic Dual 4-Stage Static Shift Registers 16-SOIC -55 to 125
Q67060-S6307-A5 High Speed CMOS Logic Dual 4-Stage Static Shift Registers 16-SOIC -55 to 125
Q67060-S6307-A6 High Speed CMOS Logic Dual 4-Stage Static Shift Registers 16-SOIC -55 to 125
Q67060-S6307-A7 High Speed CMOS Logic Quad Bilateral Switches 14-PDIP -55 to 125
Q67060-S6500-A2 TRANSISTOR HITFET
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參數描述
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