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參數資料
| 型號： | Q67060-S6302-A4 |
| 廠商： | SIEMENS AG |
| 英文描述： | High Speed CMOS Logic Dual 4-Stage Static Shift Registers 16-SOIC -55 to 125 |
| 中文描述： | 智能雙通道阻抗高側電源開關 |
| 文件頁數： | 7/14頁 |
| 文件大?。?/td> | 191K |
| 代理商： | Q67060-S6302-A4 |
BTS 611 L1
Semiconductor Group
7
Truth Table
IN1
IN2
OUT1
OUT2
ST
ST
BTS611L1
H
H
H
H
H(L
12
))
H
L
H(L
12
))
H
L
L
13
)
H
H(L
14
))
L
13)
H
H(L
14
))
H
L
L
H
L
H
L
H
BTS612N1
H
H
H
H
L
H
H
L
H
H
L
H
H
L
H
H
H
L
L
H
L
H
L
H
Normal operation
L
L
H
H
L
L
H
L
H
X
L
L
H
L
H
X
L
X
H
L
H
X
X
X
L
H
L
H
L
H
X
L
L
H
L
H
X
L
L
H
L
H
X
X
X
L
H
X
L
L
H
H
Z
Z
H
L
H
X
H
H
H
L
H
X
L
L
L
L
L
X
X
L
L
H
L
H
L
H
X
Z
Z
H
L
H
X
H
H
H
L
L
L
X
X
L
L
L
Open load
Channel 1
Channel 2
Short circuit to Vbb
Channel 1
Channel 2
Overtemperature
both channel
Channel 1
Channel 2
Undervoltage/ Overvoltage
L = "Low" Level
H = "High" Level
X = don't care
Status signal after the time delay shown in the diagrams (see fig 5. page 12...13)
Z = high impedance, potential depends on external circuit
12
)With additional external pull up resistor
13)
An external short of output to
V
bb
, in the off state, causes an internal current from output to ground. If R
GND
is used, an offset voltage at the GND and ST pins will occur and the V
ST low
signal may be errorious.
14
)Low resistance to
V
bb
may be detected in the ON-state by the no-load-detection
Terms
PROFET
V
IN2
ST
OUT2
GND
bb
VST
VIN1
IST
IIN1
Vbb
Ibb
IL2
VOUT2
IGND
VON2
1
2
4
3
5
IN1
VIN2
IIN2
VOUT1
VON1
IL1
OUT1
6
7
RGND
Input circuit (ESD protection)
IN
GND
I
R
ESD-ZD
I
I
ESD zener diodes are not to be used as voltage clamp
at DC conditions. Operation in this mode may result in
a drift of the zener voltage (increase of up to 1 V).
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