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參數資料
型號: Q67100-H6032
廠商: SIEMENS AG
英文描述: General-Purpose Power Controller
中文描述: 通用電源控制器
文件頁數: 8/53頁
文件大小: 418K
代理商: Q67100-H6032
HYB 39S64400/800/160BT(L)
64-MBit Synchronous DRAM
Data Book
8
12.99
DQM
LDQM
UDQM
Input
Pulse
Active
High
The Data Input/Output mask places the DQ buffers in a
high impedance state when sampled high. In Read mode,
DQM has a latency of two clock cycles and controls the
output buffers like an output enable. In Write mode, DQM
has a latency of zero and operates as a word mask by
allowing input data to be written if it is low but blocks the
write operation if DQM is high.
One DQM input it present in
×
4 and
×
8 SDRAMs, LDQM
and UDQM controls the lower and upper bytes in
×
16
SDRAMs.
V
DD
V
SS
Supply
Power and ground for the input buffers and the core logic.
V
DDQ
V
SSQ
Supply –
Isolated power supply and ground for the output buffers to
provide improved noise immunity.
V
REF
Input
Level
Reference voltage for SDRAM versions supporting SSTL
interface
Signal Pin Description
(cont’d)
Pin
Type
Signal Polarity Function
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相關代理商/技術參數
參數描述
Q67100-H6035 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:ICs for Communications
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