- 您現(xiàn)在的位置：買(mǎi)賣(mài)IC網(wǎng) > PDF目錄361234 > Q67100-Q1152 (SIEMENS AG) 2M x 8 - Bit Dynamic RAM 2k Refresh PDF資料下載
參數(shù)資料
| 型號(hào)： | Q67100-Q1152 |
| 廠商： | SIEMENS AG |
| 英文描述： | 2M x 8 - Bit Dynamic RAM 2k Refresh |
| 中文描述： | 200萬(wàn)× 8 -位動(dòng)態(tài)隨機(jī)存儲(chǔ)器2k刷新 |
| 文件頁(yè)數(shù)： | 19/53頁(yè) |
| 文件大小： | 418K |
| 代理商： | Q67100-Q1152 |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)當(dāng)前第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)
HYB 39S64400/800/160BT(L)
64-MBit Synchronous DRAM
Data Book
19
12.99
Notes
1. For proper power-up see the operation section of this data sheet.
2. AC timing tests have
V
IL
= 0.4 V and
V
IH
= 2.4 V with the timing referenced to the 1.4 V crossover
point. The transition time is measured between
V
IH
and
V
IL
. All AC measurements assume
t
T
= 1 ns with the AC output load circuit shown in figure below. Specified
t
AC
and
t
OH
parameters
are measured with a 50 pF only, without any resistive termination and with a input signal of 1V /
ns edge rate between 0.8 V and 2.0 V.
3. If clock rising time is longer than 1 ns, a time (
t
T
/2
0.5) ns has to be added to this parameter.
4. If
t
T
is longer than 1 ns, a time (
t
T
1) ns has to be added to this parameter.
5. These parameter account for the number of clock cycle and depend on the operating frequency
of the clock, as follows:
the number of clock cycle = specified value of timing period (counted in fractions as a whole
number)
6. Self Refresh Exit is a synchronous operation and begins on the 2nd positive clock edge after
CKE returns high. Self Refresh Exit is not complete until a time period equal to
t
RC
is satisfied
once the Self Refresh Exit command is registered.
SPT03404
CLOCK
2.4 V
0.4 V
INPUT
HOLD
t
SETUP
t
t
T
OUTPUT
1.4 V
t
LZ
AC
t
t
AC
OH
t
HZ
t
1.4 V
CL
t
CH
t
50 pF
I/O
Measurement conditions for
t
AC
and
t
OH
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| Q67100-Q1184 | 3.3V 4M x 4-Bit EDO-Dynamic RAM |
| Q67100-Q1186 | 3.3V 4M x 4-Bit EDO-Dynamic RAM |
| Q67100-Q1331 | 16 MBit Synchronous DRAM |
| Q67100-Q1333 | 16 MBit Synchronous DRAM |
| Q67100-Q1335 | 16 MBit Synchronous DRAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| Q67100-Q1184 | 制造商:INFINEON 制造商全稱(chēng):Infineon Technologies AG 功能描述:3.3V 4M x 4-Bit EDO-Dynamic RAM |
| Q67100-Q1186 | 制造商:INFINEON 制造商全稱(chēng):Infineon Technologies AG 功能描述:3.3V 4M x 4-Bit EDO-Dynamic RAM |
| Q67100-Q1323 | 制造商:INFINEON 制造商全稱(chēng):Infineon Technologies AG 功能描述:16 MBit Synchronous DRAM |
| Q67100-Q1327 | 制造商:INFINEON 制造商全稱(chēng):Infineon Technologies AG 功能描述:16 MBit Synchronous DRAM |
| Q67100-Q1331 | 制造商:INFINEON 制造商全稱(chēng):Infineon Technologies AG 功能描述:16 MBit Synchronous DRAM |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。