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參數(shù)資料
| 型號(hào)： | Q67120-C2009 |
| 廠商： | SIEMENS AG |
| 英文描述： | High Speed CMOS Logic 9-Bit Odd/Even Parity Generator/Checker 14-SOIC -55 to 125 |
| 中文描述： | 8位CMOS微控制器 |
| 文件頁(yè)數(shù)： | 10/24頁(yè) |
| 文件大小： | 980K |
| 代理商： | Q67120-C2009 |
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C167CS-xC Bare Die
Step BA
Data Sheet
6
V1.0, 2001-08
SS
19
20
21
-
-
I/O
3393
3572
3751
0 Digital Ground.
0 Digital Supply Voltage.
0 Port 2 input/output (open drain, sp. threshold),
Capt. Input/Comp. Output CC8IO,
Fast Interrupt EX0IN.
0 Port 2 input/output (open drain, sp. threshold),
Capt. Input/Comp. Output CC9IO,
Fast Interrupt EX1IN.
0 Port 2 input/output (open drain, sp. threshold),
Capt. Input/Comp. Output CC10IO,
Fast Interrupt EX2IN.
0 Port 2 input/output (open drain, sp. threshold),
Capt. Input/Comp. Output CC11IO,
Fast Interrupt EX3IN.
0 Port 2 input/output (open drain, sp. threshold),
Capt. Input/Comp. Output CC12IO,
Fast Interrupt EX4IN.
0 Port 2 input/output (open drain, sp. threshold),
Capt. Input/Comp. Output CC13IO,
Fast Interrupt EX5IN.
0 Port 2 input/output (open drain, sp. threshold),
Capt. Input/Comp. Output CC14IO,
Fast Interrupt EX6IN.
0 Port 2 input/output (open drain, sp. threshold),
Capt. Input/Comp. Output CC15IO,
Fast Interrupt EX7IN, Timer T7 input T7IN.
0 Port 3 input/output (open drain, sp. threshold),
Timer T0 Input T0IN.
0 Port 3 input/output (open drain, sp. threshold),
Timer T6 Toggle Latch Output T6OUT.
0 Port 3 input/output (open drain, sp. threshold),
CAPREL Capture Input CAPIN.
0 Port 3 input/output (open drain, sp. threshold),
Timer T3 Toggle Latch Output T3OUT.
DD
P2.8
P2.9
22
I/O
3930
P2.10
23
I/O
4109
P2.11
24
I/O
4288
P2.12
25
I/O
4467
P2.13
26
I/O
4646
P2.14
27
I/O
4826
P2.15
28
I/O
5005
P3.0
29
I/O
5184
P3.1
30
I/O
5363
P3.2
31
I/O
5542
P3.3
32
I/O
5721
Table 2
Pad Definitions and Functions
(cont
’
d)
Symbol Pad
Num
In /
Out
Position
[μm]
Function
x
y
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| Q67120-C2021 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:8-Bit CMOS Microcontroller |
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