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參數資料
型號: R3612
廠商: Power Innovations International, Inc.
英文描述: PROGRAMMABLE OVERVOLTAGE PROTECTOR FOR ERICSSON COMPONENTS 3357/3 DCLIC
中文描述: 愛立信元件3357可編程過壓保護/ 3 DCLIC
文件頁數: 1/16頁
文件大小: 222K
代理商: R3612
R3612
PROGRAMMABLE OVERVOLTAGE PROTECTOR
FOR ERICSSON COMPONENTS 3357/3 DCLIC
DECEMBER 1995 - REVISED SEPTEMBER 1997
P R O D U C T I N F O R M A T I O N
Information is current as of publication date. Products conform to specifications in accordance
with the terms of Power Innovations standard warranty. Production processing does not
necessarily include testing of all parameters.
1
Copyright 1997, Power Innovations Limited, UK
OVERVOLTAGE PROTECTION FOR ERICSSON COMPONENTS LINE INTERFACE CIRCUITS
G
PBA 3357/3 DCLIC Overvoltage Protector
G
Dual Voltage-Programmable Protector
- Wide 0 to -70 V Programming Range
- Low Voltage Overshoot Crowbar and Diode
- Low 5 mA max. Triggering Current
- Does not Charge Gate Supply
- Specified for 0°C to 70°C Operation
- Plastic Dual-in-line Package
G
Rated for International Surge Wave Shapes
description
The R3612 is a dual forward-conducting buffered
p-gate over voltage protector in a plastic DIP
package. It is designed to protect the Ericsson
Components PBA 3357/3 DCLIC (Dual Channel
Complete Line Interface Circuit) against over
voltages on the telephone line caused by
lightning, a.c. power contact and induction. The
R3612 limits voltages that exceed the DCLIC
supply rail voltage.
The DCLIC line driver section is powered from
0 V (ground) and a negative voltage in the region
of -44 V to -56 V. The protector gate is connected
to this negative supply. This references the
protection (clipping) voltage to the negative
supply voltage. As the protection voltage will
track the negative supply voltage the over
voltage stress on the DCLIC is minimised.
Positive over voltages are clipped to ground by a
low voltage overshoot diode. Negative over
voltages are initially clipped close to the DCLIC
negative supply rail value. If sufficient current is
available from the over voltage, then the
protector will crowbar into a low voltage on-state
condition. As the over voltage subsides the high
holding current of the crowbar prevents d.c.
latchup.
The buffered gate design reduces the loading on
the DCLIC supply during over voltages caused
WAVE SHAPE
STANDARD
I
TSP
A
80
38
38
30
2/10 μs
0.5/700 μs
10/700 μs
10/1000 μs
TR-NWT-001089
RLM88
K17, K20, K21
TR-NWT-001089
by power cross and induction. The gate
characteristic is designed to produce a net
current drain on the interface circuit voltage
supply during low level power cross or induction.
This removes the need for a separate clamping
diode across the voltage supply.
These
fabricated in ion-implanted planar vertical power
structures for high reliability and in normal
system operation they are virtually transparent.
monolithic
protection
devices
are
Characteristic values for the R3612 are
measured either at the extremes of the DCLIC
recommended operating voltage range (-44 V to
-56 V) or at the DCLIC maximum rated supply
voltage (-70 V).
device symbol
Terminals K1, K2 and A correspond to the alternative
line designators of T, R and G or A, B and C. The
negative protection voltage is controlled by the voltage,
V
GG,
applied to the G terminal.
SD6XAE
A
K1
G
K2
MD6XAV
P PACKAGE
(TOP VIEW)
NC - No internal connection
Terminal typical application names shown in
parenthesis
1
2
3
4
5
6
7
8
K2
G
K1
NC
K1
A
A
K2
(Tip)
(Ground)
(Ground)
(Ring)
(Gate)
(Tip)
(Ring)
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