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參數資料
| 型號： | R5F36S16DFB |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 16-BIT, FLASH, 32.72 MHz, MICROCONTROLLER, PQFP100 |
| 封裝： | 14 X 14 MM, 0.50 MM PITCH, PLASTIC, HTQFP-100 |
| 文件頁數： | 1/55頁 |
| 文件大小： | 748K |
| 代理商： | R5F36S16DFB |
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R01DS0054EJ0050 Rev.0.50
Page 1 of 52
Jun 14, 2011
M16C/6S1 Group
RENESAS MCU
Preliminary Datasheet
Specifications in this document are tentative and subject to change.
1.Overview
1.1
Features
The M16C/6S1 Group incorporates the M16C/60 Series CPU core that enables a high level of code
efficiency and high-speed operation, PLC (Power Line Communication) modem core developed by Yitran
Communications Ltd, and AFE (Analog Front End).
The implementation of DCSK (Differential Code Shift Keying) and DCSK turbo spectrum modulation
technique in the PLC modem core enables extremely robust communication over the existing electrical
wiring, with data rates up to 500 kbps.
In addition, the M16C/6S1 Group complies with worldwide regulations (FCC part 15, ARIB, and
CENELEC) and is suitable for a variety of narrowband applications like smart metering and home
networking.
1.1.1
Functions
MCU
- CPU
Operating frequency: Up to 30.72 MHz
- Memory
Flash memory: 128 KB to 256 KB
Data flash: 8 KB
RAM: 20 KB to 31 KB
- Peripheral functions
Timer A: 16-bit timer × 5, timer B: 16-bit timer × 6, watchdog timer: Real-time clock
UART: 6 channels, SIO: 2 channels, I2C: 1 channel
A/D: 10 bits, 18 channels
I/O: 56 pins
PLC
- Operating frequency: 46.08 MHz
- Data rate & Frequency band
M16C/6S compatibility mode (DCSK)
FCC&ARIB: 1.25 K, 5 K, 7.5 kbps
CENELEC: 0.625 K, 2.5 kbps
High-speed mode (DCSK turbo)
FCC & ARIB: Up to 500 kbps@PHY/up to 300 kbps@MAC payload rate
CENELEC A Band (outdoor): Up to 150 kbps@PHY/up to 90 kbps@MAC payload rate
CENELEC B Band (indoor): Up to 50 kbps@PHY/up to 30 kbps@MAC payload rate
Package: 100 pins, HTQFP
Supply voltage: 3.3 V
R01DS0054EJ0050
Rev.0.50
Jun 14, 2011
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