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參數資料
| 型號： | RC2211 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | FSK Demodulator/Tone Decoder |
| 中文描述： | FSK解調器/音頻解碼器 |
| 文件頁數： | 6/16頁 |
| 文件大小： | 135K |
| 代理商： | RC2211 |
PRODUCT SPECIFICATION
RC2211
6
Applications
FSK Decoding
Figure 2 shows the basic circuit connection for FSK decod-
ing. With reference to Figures 1 and 2, the functions of
external components are deTned as follows: R
0
and C
0
set
the PLL center frequency, R
1
sets the system bandwidth, and
C
1
sets the loop Tlter time constant and the loop damping
factor. C
F
and R
F
form a one pole post-detection Tlter for the
FSK data output. The resistor R
B
(510 k
W
) from pin 7 to pin
8 introduces positive feedback across FSK comparator to
facilitate rapid transition between output logic states.
Recommended component values for some of the most
commonly used FSK bauds are given in Table 1.
Figure 2. Circuit Connectbn for FSK Decoding
Table 1. Recommended Component Values
for Commonly Used FSK Bands
(see Circuit of Figure 2)
Design Instructions
The circuit of Figure 2 can be tailored for any FSK decoding
application by the choice of Tve key circuit components: R
0
,
R
1
, C
0
, C
1
and C
F
. For a given set of FSK mark and space
frequencies, F
1
and F
2
, these parameters can be calculated as
follows:
FSK Band
300 Baud
F
1
= 1070 Hz
F
2
= 1270 Hz
300 Baud
F
1
= 2025 Hz
F
2
= 2225 Hz
1200 Baud
F
1
= 1200 Hz
F
2
= 2200 Hz
Component Values
C
0
= 0.039
m
F, C
F
= 0.005
m
F
C
1
= 0.01
m
F, R
0
= 18 k
W
R
1
= 100 k
W
C
0
= 0.022
m
F, C
F
= 0.005
m
F
C
1
= 0.0047
m
F, R
0
= 18 k
W
R
1
= 200 k
W
C
0
= 0.027
m
F, C
F
= 0.0022
m
F
C
1
= 0.01
m
F, R
0
= 18 k
W
R
1
= 30 k
W
1
2
3
4
5
6
7
14
13
12
11
10
9
8
RC2211
65-2211-05
C0
VCO
Fine Tune
R0
R
X
5K
R1
C1
0.1
μ
F
R
F
100K
510K
C
F
FSK Data
Output
5.1K
+V
S
0.1
μ
F
0.1
μ
F
+V
S
FSK
Input
R
L
R
B
1.
Calculate PLL center frequency, F
0
2.
Choose a value of timing resistor R
0
to be in the range
of 10 k
W
to 100 k
W
. This choice is arbitrary. The recom-
mended value is R
0
= 20 k
W
. The Tnal value of R
0
ios
normally Tnetuned with the series potentiometer, R
X
.
3.
Calculate value of C
0
from Design Equation No. 1 or
from Typical Performance Characteristics:
C
0
= 1/R
0
F
0
4.
Calculate R
1
to give a
D
f equal to the markspace
deviation:
R
1
= R
0
[F
0
/(F
1
- F
2
)]
5.
Calculate C
1
to set loop damping. (See Design Equation
No. 4)
Normally,
z
1/2 is recommended
Then: C
1
= C
0
/4 for
z
= 1/2
6.
Calculate Data Filter Capacitance, C
F
:
For R
F
= 100 k
W
, R
B
= 510 k
W
, the recommended value
of C
F
is:
Note:
All calculated component values except RO can be
rounded off to the nearest standard value, and R0 can
be varied to fine-tune center frequency through a series
potentiometer, R
X
(see Figure 2).
Design Example
75 Baud FSK demodulator with mark space frequencies of
1110/1170 Hz:
Step 1: Calculate F
0
:
F
0
=(1110+1170)(1/2)= 1140Hz
Step 2: Choose R
0
= 20 k
W
(18 k
W
Txed resistor in series
with 5 k
W
potentiometer)
Step 3: Calculate C
0
from VCO Frequency vs. Timing
Capacitor: C
9
= 0.044
m
F
Step 4: Calculate R
1
: R
1
= R
0
(1140/60) = 380 k
W
Step 5: Calculate C
1
: C
1
= C
0
/4 = 0.011
m
F
Note:
All values except R
0
can be rounded off to nearest
standard value.
fF
0
F
------2
F
2
+
=
C
F
in
m
F
(
)
Baud Rate
-----------3
=
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