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參數資料
| 型號： | RC86L50-3 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | VOICE SYNTHESIZER |
| 中文描述： | 語音合成器 |
| 文件頁數： | 27/48頁 |
| 文件大小： | 747K |
| 代理商： | RC86L50-3 |
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27
RC8650 VOICE SYNTHESIZER
RC SYSTEMS
Audio Control Register (nN)
The Audio Control Register determines whether the RC8650’s audio
stream will be output as an analog signal on the AO pins or as serial
digital data on the DAOUT pin. See Table 2.10 for the definition of each
register bit. The default register setting is 0N.
In the digital audio modes, data is transferred from the DAOUT pin in
8 bit linear, offset binary format (midscale = 80h). The DARTS# pin can
be used to regulate the flow of data—it must be Low for transfers to
begin. In the synchronous mode, do not attempt to read the data at an
average rate faster than 10 kbytes/sec. At clock rates above 80 kHz
the host must pause between reading each byte in order to keep the
average transfer rate from exceeding 10 kbytes/sec.
Figure 2.1 illustrates the synchronous data transfer mode. Note how
either DARTS# or DACLK can be used to regulate the flow of data
from the RC8650.
Note
Relative parameters work differently than usual with this com-
mand. Instead of specifying a displacement from the register’s
current value, relative parameters allow you to set (“+”) and clear
(“–”) individual register bits. For example, +40N sets bits ACR.3 and
ACR.5; –5N clears ACR.0 and ACR.2.
Table 2.10. Audio Control Register Definitions
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相關代理商/技術參數 |
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| RC86L60-1 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:CMOS, 3.3 Volt / 5 Volt Voice Synthesizer Chipset |
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| RC86L60-3 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:CMOS, 3.3 Volt / 5 Volt Voice Synthesizer Chipset |
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