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參數資料
| 型號： | RS8250EVM |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | ServiceSAR Controller |
| 中文描述： | ServiceSAR控制器 |
| 文件頁數： | 4/8頁 |
| 文件大小： | 566K |
| 代理商： | RS8250EVM |
Special Features:
Service-Specific
Performance Accelerators
LECID filtering and echo suppression
Dual leaky bucket based on CLP (Frame Relay)
Frame Relay DE interworking
Internal SNMP MIB counters
Flexible Architectures
Multi-peer host
Direct switch attachment via reverse UTOPIA
ATM Terminal
– Host control
– Local Bus control
Optional local processor
xBR Traffic Management
T.M. 4.1 Service Classes
– CBR
– VBR (single, dual and CLP 0+1 leaky buckets)
– Real-time VBR
– ABR
– UBR
– GFC (controlled and uncontrolled flows)
– Guaranteed frame rate (GFR)
(guaranteed MCR on UBR VCCs)
8 levels of priorities (8 + CBR)
Dynamic per-VCC scheduling
Multiple programmable ABR templates
(supplied by Conexant or user)
Scheduler driven by local clock for low-jitter CBR
Internal RM OAM cell feedback path
Virtual FIFO rate matching (source rate matching)
Tunneling
– VP tunnels (VCI interleaving on PDU boundaries)
– CBR tunnels (cells interleaved on UBR
with an aggregate CBR limit)
Multi-Queue Segmentation Processing
32 transmit queues with optional priority levels
64K VCCs maximum **
AAL5 and AAL3/4 CPCS generation
AAL0 null CPCS (optional use of PTI for
PDU demarcation)
ATM cell header generation
Raw cell mode (52 octet)
200 Mbps half duplex
155 Mbps full duplex (with 2-cell PDUs)
Message and streaming status modes
Variable-length transmit FIFO-CDV-host
latency matching (1 to 9 cells)
Symmetric Tx and Rx architecture
– Buffer descriptors
– Queues
User-defined field circulates back to host (32 bits)
Distributed host or SAR-shared
memory segmentation
Simultaneous segmentation and reassembly
Per-PDU control of CLP/PTI (UBR)
Per-PDU control of AAL5 UU field
Virtual Tx FIFO (PCI host)
RS8234 xBR SAR
n e t w o r k a c c e s s p r o d u c t s
The RS823xHPI provides a reference implementation of these
critical functions in order to shorten the development of a
production-quality, customer system-specific ATM application.
The RS823xHPI is implemented in well-documented C source
code, specifically written to be highly portable across a multiplicity
of processors, compilers and development environments.
RS8234EVM Evaluation Software
The RS8234EVM system software is a complete reference
implementation of an ATM terminal for device testing and
evaluation using the RS8234EVM, RS823xHPI and the VxWorks
operating system. This evaluation system software provides a
reference design that the system designer can utilize in part
or in full in tailoring customer-specific ATM applications.
The RS823xHPI macro layer, together with the RS823xHPI,
forms a complete device driver for the RS8234 in a VxWorks
environment. The user does not need an advanced knowledge of
the device or full understanding of every detail to successfully
operate the RS8234 device.
Also provided is the traffic generator and checker (TGC), which
utilizes the RS823xHPI primitives to send ATM traffic and check
the data on its return on the reassembly side. This module was
designed to exercise the functionality of the RS8234 device.
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相關代理商/技術參數 |
參數描述 |
|---|---|
| RS8251EVM | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:ServiceSAR Controller |
| RS8-29754 | 制造商:Banner Engineering 功能描述:RS8-29754 SOCKET SEE NOTE |
| RS-8-30 | 制造商:Thomas & Betts 功能描述:4"SQBXCVR,STL,5CU,2-DX FL RCPT,RSD |
| RS8-30 | 制造商:Thomas & Betts 功能描述:4SQBXCVR,STL,5CU,2-DX FL RCPT,RSD |
| RS850-AMBAJ3-US | 制造商:Cooler Master Co., Ltd. 功能描述:PSU - Bulk |
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