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參數(shù)資料

型號(hào)：	S1D13600F00A
元件分類：	顯示控制器
英文描述：	CRT OR FLAT PNL GRPH DSPL CTLR, PQFP64
封裝：	QFP6-64
文件頁數(shù)：	1/29頁
文件大小：	190K
代理商：	S1D13600F00A

S1D13600 Series

Rev. 2.3

EPSON

1–1

1. INTRODUCTION

Scope

This is the Functional Specification for S1D13600 3.3 V Ultra low Power LCD Controller Chip.

Objectives

(1) To specify functions and interface requirements of the chip.

(2) To allow review of the functions of the chip, as a preliminary specification.

2. FEATURES

Technology

ultra low power CMOS process

3.3 volt operation

chip supply with aluminum pad

64 pin QFP6 surface mount package

System

Direct connection to the 68 family CPUs.

minimum CPU Interface pin count.

no buffers are required in a 3.3 V-System.

internal oscillator with external Capacitance and Resistance, or external oscillator for a low frequency

input source.

interfaces to 64 kb and, or 256 kb SRAMs.

controls Seiko Epson’s RAM integrated Segment Drivers.

self-controlled Doze Mode.

optimized Hardware for low to medium resolution LCDs.

ultra low power consumption.

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