- 您現在的位置：買賣IC網 > PDF目錄374647 > S2066 (Applied Micro Circuits Corp.) Quad GigaBit Ethernet Transceiver(四千兆位以太網收發器) PDF資料下載
參數資料
| 型號： | S2066 |
| 廠商： | Applied Micro Circuits Corp. |
| 英文描述： | Quad GigaBit Ethernet Transceiver(四千兆位以太網收發器) |
| 中文描述： | 四個千兆以太網收發器（四千兆位以太網收發器） |
| 文件頁數： | 1/28頁 |
| 文件大小： | 301K |
| 代理商： | S2066 |
當前第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁
1
S2066
S2066
QUAD GIGABIT ETHERNET TRANSCEIVER
October 13, 2000 / Revision C
DEVICE
SPECIFICATION
FEATURES
Functionally compliant with IEEE 802.3z Gigabit
Ethernet Applications
1250 MHz (Gigabit Ethernet) operating rate
- 1/2 Rate Operation
Quad Transmitter incorporating phase-locked
loop (PLL) clock synthesis from low speed
reference
Quad Receiver PLL provides clock and data
recovery
Internally series terminated TTL outputs
Low-jitter serial PECL interface
Local Loopback
Interfaces with coax, twinax, or fiber optics
Single +3.3V supply, 2.3 W Power dissipation
Compact 23mm x 23mm 208 TBGA package
APPLICATIONS
High-speed data communications
Ethernet Backbones
Multi-port Gigabit Ethernet Cards
Switched networks
Data broadcast environments
GENERAL DESCRIPTION
The S2066 quad transmitter and receiver chip is de-
signed to provide four channels of high-speed serial
data transmission over fiber optic or copper interfaces
conforming to the requirements of the IEEE 802.3z
Gigabit Ethernet specification. The chip runs at
1250.0 Mbit/s serial data rate with an associated 10-
bit parallel data word. The chip provides four separate
transceivers which can be operated individually at
slightly different frequencies.
Each bi-directional channel provides parallel to serial
and serial to parallel conversion, clock generation
and recovery, and framing. The on-chip transmit PLL
synthesizes the high-speed clock from a low-speed
reference. The on-chip quad receive PLL is used for
clock recovery and data re-timing on the four inde-
pendent data inputs. The transmitter and receiver
each support differential PECL-compatible I/O for
copper or fiber optic component interfaces and pro-
vide excellent signal integrity. Local loopback mode
allows for system diagnostics. The chip requires a
3.3V power supply and dissipates approximately 2.3
watts.
Figure 1 shows the use of the S2064 and S2066 in a
Gigabit Ethernet application. Figure 2 summarizes the
input/output signals of the device. Figures 3 and 4
show the transmit and receive block diagrams, re-
spectively.
Figure 1. Typical Quad Gigabit Ethernet Application
MAC
(ASIC)
S2064
QUAD
GIGABIT
ETHERNET
INTERFACE
MAC
(ASIC)
MAC
(ASIC)
MAC
(ASIC)
TO SERIAL BACKPLANE
S2066
GE INTERFACE
SERIAL BP DRIVER
相關PDF資料 |
PDF描述 |
|---|---|
| S2067 | Dual Serial Backplane Transceiver with Dual I/O(帶雙傳送接收串行I/O的雙收發器) |
| S2068 | Dual GigaBit Ethernet Transceiver(雙千兆位以太網收發器) |
| S2070 | Fibre Channel and GigaBit Ethernet Transceiver(帶片上鎖相環的光纖通道/千兆位以太網收發器) |
| S2071 | Four Port Bypass for FC-AL(用于FC-AL的四端口旁路電路) |
| S2072 | Four Port Bypass and Repeater for FC-AL(用于FC-AL的四端口旁路電路和中繼器) |
相關代理商/技術參數 |
參數描述 |
|---|---|
| S2066A | 制造商:AMCC 功能描述:ETHERNET TXRX SGL CHIP 4-PORT 3.3V 1.25GBPS 208TBGA - Trays |
| S2067TB | 制造商:AppliedMicro 功能描述:Backplane Transceiver 156-Pin TBGA |
| S2067TRI | 制造商:AMCC 功能描述:SBP DUAL PORT XCVR W/DUAL I/O (ROHS EQUIV OF S2067TB) - Trays |
| S2068TBI | 制造商:AppliedMicro 功能描述:DUAL GIGABIT ETHERNET TRANSCEIVER |
| S2068TBI001 | 制造商:AppliedMicro 功能描述:DATACOM, ETHERNET TRANSCEIVER, 156 Pin Plastic BGA |
發布緊急采購，3分鐘左右您將得到回復。