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參數(shù)資料
型號(hào): S25FL001D0FNFI001
廠商: SPANSION LLC
元件分類: DRAM
英文描述: 2 Megabit, 1 Megabit CMOS 3.0 Volt Flash Memory with 25 MHz SPI Bus Interface
中文描述: 1M X 1 SPI BUS SERIAL EEPROM, PDSO8
封裝: 6 X 5 MM, LEAD FREE, WSON-8
文件頁(yè)數(shù): 1/38頁(yè)
文件大小: 488K
代理商: S25FL001D0FNFI001
Publication Number
30167
Revision
A
Amendment
+1
Issue Date
June 9, 2004
PRELIMINARY
INFORMATION
S25FL Family (Serial Peripheral Interface)
S25FL002D, S25FL001D
2 Megabit, 1 Megabit CMOS 3.0 Volt Flash Memory
with 25 MHz SPI Bus Interface
Distinctive Characteristics
ARCHITECTURAL ADVANTAGES
Single power supply operation
— Full voltage range: 2.7 to 3.6 V read and program
operations
Memory Architecture
— 2 Mb – Four sectors with 512 Kb each
— 1 Mb – Four sectors with 256 Kb each
Program
— Page Program (up to 256 bytes) in 6 ms (typical)
— Program cycles are on a page by page basis
Erase
— 0.25 s typical sector erase time (S25FL001D)
— 0.5 s typical sector erase time (S25FL002D)
— 1.0 s typical bulk erase time (S25FL001D)
— 2.0 s typical bulk erase time (S25FL002D)
Endurance
— 100,000 cycles per sector typical
Data Retention
— 20 years typical
Device ID
— Electronic signature
Process Technology
— Manufactured on 0.25 μm process technology
Package Option
— Industry Standard Pinouts
— 150 mil 8-pin SO package for 1Mb and 2Mb
— 208 mil 8-pin SO package for 2Mb only
— 8-contact WSON leadless package (6x5 mm)
PERFORMANCE CHARACTERISTICS
Speed
— 25 MHz clock rate (maximum)
Power Saving Standby Mode
— Standby Mode 1 μA (typical)
Memory Protection Features
Memory Protection
— W# pin works in conjunction with Status Register Bits
to protect specified memory areas
— Status Register Block Protection bits (BP1, BP0) in
status register configure parts of memory as read-
only
SOFTWARE FEATURES
SPI Bus Compatible Serial Interface
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