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參數(shù)資料
型號： S29GL032M10FFIR40
廠商： SPANSION LLC
元件分類： PROM
英文描述： Tantalum Capacitor; Capacitance:330uF; Capacitance Tolerance:+/- 20 %; Working Voltage, DC:10V; Package/Case:7343-43; Terminal Type:PCB SMT; ESR:0.001ohm; Packaging:Cut Tape; Series:T530
中文描述： 2M X 16 FLASH 3V PROM, 100 ns, PBGA64
封裝： 13 X 11 MM, LEAD FREE, FORTIFIED, BGA-64
文件頁數(shù)： 82/116頁
文件大小： 6024K
代理商： S29GL032M10FFIR40
66
S29GL-M MirrorBitTM Flash Family
S29GL-M_00_B8 February 7, 2007
Data
Sheet
Figure 5. Program Suspend/Program Resume
Chip Erase Command Sequence
Chip erase is a six bus cycle operation. The chip erase command sequence is initiated by writing
two unlock cycles, followed by a set-up command. Two additional unlock write cycles are then
followed by the chip erase command, which in turn invokes the Embedded Erase algorithm. The
device does not require the system to preprogram prior to erase. The Embedded Erase algorithm
automatically preprograms and verifies the entire memory for an all zero data pattern prior to
electrical erase. The system is not required to provide any controls or timings during these oper-
ations. Table 34 and Table 35 show the address and data requirements for the chip erase
command sequence.
When the Embedded Erase algorithm is complete, the device returns to the read mode and ad-
dresses are no longer latched. The system can determine the status of the erase operation by
using DQ7, DQ6, or DQ2. See Write Operation Status for information on these status bits.
Any commands written during the chip erase operation are ignored. However, note that a hard-
ware reset immediately terminates the erase operation. If that occurs, the chip erase command
sequence should be reinitiated once the device returns to reading array data, to ensure data
integrity.
Figure 6 illustrates the algorithm for the erase operation. See Erase and Programming Perfor-
mance in AC Characteristics for parameters, and Figure 18 for timing diagrams.
Sector Erase Command Sequence
Sector erase is a six bus cycle operation. The sector erase command sequence is initiated by writ-
ing two unlock cycles, followed by a set-up command. Two additional unlock cycles are written,
and are then followed by the address of the sector to be erased, and the sector erase command.
Table 34 and Table 35 shows the address and data requirements for the sector erase command
sequence.
Program Operation
or Write-to-Buffer
Sequence in Progress
Write Program Suspend
Command Sequence
Command is also valid for
Erase-suspended-program
operations
Autoselect and SecSi Sector
read operations are also allowed
Data cannot be read from erase- or
program-suspended sectors
Write Program Resume
Command Sequence
Read data as
required
Done
reading?
No
Yes
Write address/data
XXXh/30h
Device reverts to
operation prior to
Program Suspend
Write address/data
XXXh/B0h
Wait 15
μs
相關(guān)PDF資料
PDF描述
S29GL032M10FFIR42 MirrorBit Flash Family
S29GL032M10FFIR43 MirrorBit Flash Family
S29GL032M10BAIR30 MirrorBit Flash Family
S29GL032M10BAIR32 MirrorBit Flash Family
S29GL032M10BAIR33 MirrorBit Flash Family
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
S29GL032M10FFIR42 制造商:SPANSION 制造商全稱:SPANSION 功能描述:3.0 Volt-only Page Mode Flash Memory featuring 0.23 um MirrorBit process technology
S29GL032M10FFIR43 制造商:SPANSION 制造商全稱:SPANSION 功能描述:MirrorBit Flash Family
S29GL032M10FFIR50 制造商:SPANSION 制造商全稱:SPANSION 功能描述:MirrorBit Flash Family
S29GL032M10FFIR52 制造商:SPANSION 制造商全稱:SPANSION 功能描述:MirrorBit Flash Family
S29GL032M10FFIR53 制造商:SPANSION 制造商全稱:SPANSION 功能描述:MirrorBit Flash Family
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