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參數資料
| 型號： | SAA8M16Yx6xV4TL |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | DOUBLE DATA RATE (DDR) SDRAM |
| 中文描述： | 雙數據速率（DDR）SDRAM內存 |
| 文件頁數： | 1/13頁 |
| 文件大小： | 256K |
| 代理商： | SAA8M16YX6XV4TL |
128Mb: x4, x8, x16
DDR SDRAM
PDF: 09005aef80505d1b / Source: 09005aef80469e44
128Mb: x4, x8, x16 DDR SDRAM
Rev: 11/23/2004
1
www.spectek.com
SpecTek reserves the right to change products or specifications
without notice.
2001, 2002, 2004 SpecTek
DOUBLE DATA RATE
(DDR) SDRAM
PC1600 and PC2100 compatible
VDD = +2.5V ±0.2V, VDDQ = +2.5V ±0.2V
Bi-directional data strobe (DQS) transmitted/ received with
data, i.e., source-synchronous data capture (x16 has two –
one per byte)
Internal, pipelined double-data-rate (DDR) architecture;
two data accesses per clock cycle
Differential clock inputs (CK and CK#)
Commands entered on each positive CK edge
DQS edge-aligned with data for READs; center-aligned
with data for WRITEs
DLL to align DQ and DQS transitions with CK
Four internal banks for concurrent operation
Data mask (DM) for masking write data (x16 has two –
one per byte)
Programmable burst lengths: 2, 4, or 8
Auto precharge option
Auto Refresh
Longer lead TSOP for improved reliability (OCPL)
2.5V I/O (SSTL_2 compatible)
Options:
Designation:
Family
SpecTek Memory
SAA
Configuration
32 Meg x 4 (8 Meg x 4 x 4 banks)
16 Meg x 8 (4 Meg x 8 x 4 banks)
8 Meg x 16 (2 Meg x 16 x 4 banks)
32M4
16M8
8M16
Design ID
DDR 128 Megabit Design
(Call SpecTek Sales for details on
availability of “x” placeholders)
Yx6x
Voltage and refresh
2.5V, Auto Refresh
2.5V, Self or Auto Refresh
V4
R4
Plastic Package – OCPL
66-pin TSOP
(400 mil width, 0.65mm pin pitch)
TL
Timing – Cycle Time
7.5ns @ CL = 2.5 (PC2100)
10ns @ CL = 2.5 (PC1600)
-75A
-8A
Part number example:
(For part numbers prior to December
2004, refer to
page 13
for decoding.)
SAA16M8T95AV4TL-75A
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