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參數資料
型號: SC2463TSTRT
廠商: Semtech
文件頁數: 11/23頁
文件大小: 459K
描述: IC REG QD BCK/LINEAR 28TSSOP
標準包裝: 1
拓撲: 降壓(降壓)同步(2),線性(LDO)(2)
功能: 任何功能
輸出數: 4
頻率 - 開關: 600kHz
電壓/電流 - 輸出 1: 控制器
電壓/電流 - 輸出 2: 控制器
電壓/電流 - 輸出 3: 控制器
帶 LED 驅動器:
帶監控器:
帶序列發生器:
電源電壓: 4.5 V ~ 30 V
工作溫度: -40°C ~ 105°C
安裝類型: 表面貼裝
封裝/外殼: 28-TSSOP(0.173",4.40mm 寬)
供應商設備封裝: 28-TSSOP
包裝: 標準包裝
產品目錄頁面: 1358 (CN2011-ZH PDF)
其它名稱: SC2463TSDKR
11
?2007 Semtech Corp.
www.semtech.com
SC2463
POWER MANAGEMENT
Applications Information (Cont.)
Shoot through control circuitry provides a 30ns dead time
to ensure both the upper and lower MOSFET will not turn
on simultaneously and cause a shoot through condition.
Error Amplifier and PWM Controller
Error Amplifier and PWM Controller
Error Amplifier and PWM Controller
Error Amplifier and PWM Controller
Error Amplifier and PWM Controller
In closed loop operation, the internal oscillator ramp
ranges from 0.75V to 3.8V. The error amplifier output
ranges determines duty-ratio of a converter. The synchro-
nous continuous-conduction mode of operation allows
the SC2463 to regulate the output irrespective of the
direction of the load current.
The SC2463 uses voltage-mode control for good noise
immunity and ease of compensation. The low-side
MOSFET of each channel is turned off at the falling-edge
of the phase timing clock. After a brief non-overlapping
time interval of 30ns, the high-side MOSFET is turned
on. The phase inductor current ramps up. When the in-
ternal ramp reaches the threshold determined by the
error amplifier output, the high-side MOSFET is turned
off. As long as phase voltage collapses below 1.5V, the
low-side MOSFET is turned on.
Buck Converter
Buck Converter
Buck Converter
Buck Converter
Buck Converter
Buck converter design includes the following specifica-
tions:
Input voltage range:
]
V
,
V
[
V
max
,
in
min
,
in
in

Input voltage ripple (peak-to-peak): V
in
Output voltage: V
o
Output voltage accuracy: ?/DIV>
Output voltage ripple (peak-to-peak): V
o
Nominal output (load) current: I
o
Maximum output current limit: I
o,max
Output (load) current transient slew rate: dI
o
(A/s)
Circuit efficiency: ?/DIV>
Selection criteria and design procedures for the
following are described:
1) output inductor (L) type and value
2) output capacitor (C
o
) type and value
3) input capacitor (C
in
) type and value
4) power MOSFETs
5) current sensing and limiting circuit
6) voltage sensing circuit
7) loop compensation network
Operating Frequency (f
Operating Frequency (f
Operating Frequency (f
Operating Frequency (f
Operating Frequency (f
ss ss s
))
)))
The switching frequency in the SC2463 is user-
programmable. The advantages of using constant
frequency operation are simple passive component
selection and ease of feedback compensation. Before
setting the operating frequency, the following trade-offs
should be considered:
1) Passive component size
2) Circuitry efficiency
3) EMI condition
4) Minimum switch on time and
5) Maximum duty ratio
For a given output power, the sizes of the passive
components are inversely proportional to the switching
frequency, whereas MOSFET/Diode switching losses are
proportional to the operating frequency. Other issues
such as heat dissipation, packaging and the cost issues
are also to be considered. The frequency bands for
signal transmission should be avoided because of EM
interference.
Minimum Switc
Minimum Switc
Minimum Switc
Minimum Switc
Minimum Switch On Time Consideration
h On Time Consideration
h On Time Consideration
h On Time Consideration
h On Time Consideration
In the SC2463, the falling edge of the clock turns on
the top MOSFET. The inductor current and the sensed
voltage ramp up. After the internal ramp voltage crosses
a threshold determined by the error amplifier output,
the top MOSFET is turned off. The propagation delay
time from the turn-on of the controlling FET to its turn-
off is the minimum switch on time. The SC2463 has a
minimum on time of about 50ns at room temperature.
This is the shortest on interval of the controlling FET.
The controller either does not turn on the top MOSFET
at all or turns it on for at least 50ns.
For a synchronous step-down converter, the operating
duty cycle is V
O
/V
IN
. So the required on time for the top
MOSFET is V
O
/(V
IN
fs). If the frequency is set such that
the required pulse width is less than 50ns, then the
converter will start skipping cycles. Due to minimum on
time limitation, simultaneously operating at very high
switching frequency and very short duty cycle is not
practical. If the voltage conversion ratio V
O
/V
IN
 and
hence the required duty cycle is higher, the switching
frequency can be increased to reduce the size of passive
components.
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