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參數資料
型號: SC3019B
廠商: RF Monolithics, Inc.
英文描述: 500.0 MHz Differential Sine-Wave Clock
中文描述: 500.0兆赫差分正弦波時鐘
文件頁數: 1/2頁
文件大小: 74K
代理商: SC3019B
RF Monolithics, Inc.
RFM Europe
1999 by RF Monolithics, Inc. The stylized RFM logo are registered trademarks of RF Monolithics, Inc.
Phone: (972) 233-2903
Phone: 44 1963 251383
Fax: (972) 387-9148
Fax: 44 1963 251510
E-mail: info@rfm.com
http://www.rfm.com
SC3019B-111799
Page 1 of 2
Case Temperature (Powered or Storage)
CAUTION: Electrostatic Sensitive Device. Observe precautions for handling.
NOTES:
Unless otherwise noted, all specifications include any combination of load
VSWR, VCC, and TA. In addition, Q and Q are terminated into 50
loads to
ground. (See: Typical Test Circuit.)
One or more of the following United States patents apply: 4,616,197; 4,670,681;
4,760,352.
The design, manufacturing process, and specifications of this device are subject
to change without notice.
Only under the nominal conditions of 50
load impedance with VSWR
1.2 and
nominal power supply voltage.
Symmetry is defined as the pulse width (in percent of total period) measured at
the 50% points of Q or Q. (See: Timing Definitions.)
Electrical Characteristics
Characteristic
Absolute Frequency
Tolerance from 500.000 MHz
Voltage into 50
(VSWR
1.2)
Operating Load VSWR
Symmetry
Harmonic Spurious
Nonharmonic Spurious
No Noise on V
CC
200 mV
P-P
from 1 MHz to 1/2 f
O
on
Amplitude into 50
Sym
f
O
f
O
V
O
Notes
Minimum
499.900
Typical
Maximum
500.100
±200
1.1
2:1
51
-20
-60
30
35
75
Units
MHz
ppm
Output Frequency
1, 2
Q and Q Output
1, 3
0.60
V
P-P
3, 4, 5
49
%
dBc
dBc
ps
P-P
ps
P-P
mV
P-P
K
V
V
mA
mA
ms
VDC
mA
°C
3, 4, 6
-25
Q and Q Period Jitter
3, 4, 6, 7
3, 4, 7, 8
3, 9
3
15
Output (Disabled)
Output DC Resistance (between Q & Q)
ENABLE (Terminal 14)
50
Input HIGH Voltage
Input LOW Voltage
Input HIGH Current
Input LOW Current
Propagation Delay
Operating Voltage
Operating Current
V
IH
V
IL
I
IH
I
IL
t
PD
V
CC
I
CC
T
A
3, 9
V
CC
-0.1
0.0
V
CC
V
CC
+0.1
0.20
5
-1
1
+3.47
40
+70
3
DC Power Supply
1, 3
+3.13
+3.30
20
Operating Ambient Temperature
Lid Symbolization (YY = Year, WW = Week)
1, 3
0
RFM SC3019B 500.00 MHz YYWW
Quartz SAW Frequency Stability
Fundamental Fixed Frequency
Very Low Jitter and Power Consumption
Rugged, Miniature, Surface-Mount Case
Low-Voltage Power Supply (3.3 VDC)
This digital clock is designed for use with high-speed CPUs and digitizers. Fundamental-mode oscillation is
made possible by surface-acoustic-wave (SAW) technology. The design results in low jitter, compact size,
and low power consumption. Differential outputs provide a sine wave that is capable of driving 50
loads.
Rating
Value
0 to +4.0
0 to +4.0
-40 to +85
Units
VDC
VDC
°C
Power Supply Voltage (V
CC
at Terminal 1)
Input Voltage (ENABLE at Terminal 8)
500.0 MHz
Differential
Sine-Wave
Clock
SC3019B
SMC-8 Case
1.
2.
3.
4.
5.
6.
Jitter and other spurious outputs induced by externally generated electrical noise
on V
CC
or mechanical vibration are not included. Dedicated external voltage
regulation and careful PCB layout are recommended for optimum performance.
Applies to period jitter of Q and Q. Measurements are made with the Tektronix
CSA803 signal analyzer with at least 1000 samples.
Period jitter measured with a 200 mV
P-P
sine wave swept from 1 MHz to one-half
of f
O
at the V
CC
power supply terminal.
The outputs are enabled when Terminal 8 is at logic HIGH. Propagation delay is
defined as the time from the 50% point on the rising edge of ENABLE to the 90%
point on the rising edge of the output amplitude or as the fall time from the 50%
point to the 10% point. (SEE: Timing Definitions.)
7.
8.
9.
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