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參數(shù)資料
| 型號(hào)： | SCM6946 |
| 廠商： | Motorola, Inc. |
| 英文描述： | 512Kx8 Bit Static Random Access Memory(512Kx8位靜態(tài)RAM) |
| 中文描述： | 512Kx8位靜態(tài)隨機(jī)存取存儲(chǔ)器（512Kx8位靜態(tài)RAM）的 |
| 文件頁數(shù)： | 1/9頁 |
| 文件大小： | 171K |
| 代理商： | SCM6946 |
MCM6946
SCM6946
1
MOTOROLA FAST SRAM
Motorola, Inc. 1999
512K x 8 Bit Static Random
Access Memory
The MCM6946/SCM6946 is a 4,194,304–bit static random access memory or-
ganized as 524,288 words of 8 bits. Static design eliminates the need for external
clocks or timing strobes.
The MCM6946/SCM6946 is equipped with chip enable (E) and output enable
(G) pins, allowing for greater system flexibility and eliminating bus contention
problems. Either input, when high, will force the outputs into high impedance.
The MCM6946 is available in a 400 mil, 36–lead surface–mount SOJ package.
Single 3.3 V – 5%, + 10% Power Supply
Fast Access Time: 8/10/12/15 ns
Equal Address and Chip Enable Access Time
All Inputs and Outputs are TTL Compatible
Three–State Outputs
Power Operation: 195/185/180/175 mA Maximum, Active AC
Available in TSOP or SOJ Packages
BLOCK DIAGRAM
G
A
A
A
A
A
A
A
A
A
MEMORY MATRIX
ROW
DECODER
INPUT
DATA
CONTROL
A
A
A
A
A
A
A
A
DQ
DQ
E
W
A
A
COLUMN I/O
COLUMN DECODER
DQ
DQ
Order this document
by MCM6946/D
SEMICONDUCTOR TECHNICAL DATA
YJ PACKAGE
400 MIL SOJ
CASE 893–02
MCM6946
SCM6946
A0 – A18
W
. . . . . . . . . . . . . . . . . . . . . . .
G
. . . . . . . . . . . . . . . . . . . . .
E
. . . . . . . . . . . . . . . . . . . . . . . .
DQ
. . . . . . . . . . . . . . . . .
NC
. . . . . . . . . . . . . . . . . . . .
VDD
. . . . . . . . . . . . .
VSS
. . . . . . . . . . . . . . . . . . . . . . . . .
Address Inputs
Write Enable
Output Enable
Chip Enable
Data Input/Output
No Connection
+ 3.3 V Power Supply
. . . . . . . . . . . . . . .
Ground
PIN NAMES
TS PACKAGE
44–LEAD
TSOP TYPE II
CASE 924A–02
REV 8
1/29/99
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