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參數資料
| 型號： | SDA9290-6 |
| 廠商： | SIEMENS A G |
| 元件分類： | 消費家電 |
| 英文描述： | Picture Processor |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, PQCC68 |
| 文件頁數： | 1/28頁 |
| 文件大小： | 239K |
| 代理商： | SDA9290-6 |
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Functional Description
The CMOS device SDA 9290-6 is a picture processor and belongs to a family of devices
forming an extended third-generation digital TV signal-processing system for enhanced
picture quality with special functions (Featurebox). Besides the Picture Processor (PP)
that is described here, the system consists of a field memory (at least three triple-port,
1-Mbit generation
TV S
equential-
A
ccess
M
emory devices (SDA 9251 X), a
M
emory
S
ync
C
ontroller (MSC SDA 9220-5) and a
D
isplay
P
rozessor (SDA 9280). A block
diagram of the Featurebox is shown in
figure 4
.
The Picture Processor SDA 9290-6 is a follow-on development of the Picture Processor
SDA 9290-5. Modifications of the movement detector and the recursive filters permits
further picture improvement by reducing the video noise and cross-color interference.
The SDA 9290-6 can be set independently at the picture-signal input and output via the
two pins FSBQ/FSI to the 4:1:1 and 4:2:2 formats. A 4:1:1 Featurebox (3 TV-SAMs) can
therefore be operated with 4:2:2 input signals as well.
Type
SDA 9290-6
Ordering Code
Q67101-H5193
Package
P-LCC-68-1 (SMD)
Picture Processor
Preliminary Data
CMOS IC
SDA 9290-6
P-LCC-68-1
Features
Noise and cross color reduction by field - or frame
recursive filtering
Adjustment of degree of noise reduction
Automatic adaption to signal quality during vertical
blanking
Pixel adaptive movement detection
Split screen modes for demonstration purposes
Multi-picture facilities
Picture decimation using vertical filtering
8 programmable grey levels for framing
4:1:1 and 4:2:2 (Y:U:V) compatibility
8-bit word size for all components
IIC-Bus programming of the video line for S/N
measurement in automatic adaption mode
Optimized characteristics of the recursive filters
Semiconductor Group
1
1997-07-22
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