
1
Dot Matrix LCD Controller Driver
PF282-07
G
1/8, 1/11 or 1/16 Duty Dot Matrix Drive
G
Built-in Character Generator ROM and RAM ( )
G
Maximum Simultaneous Display of 80 Characters
(With extension LCD driver)
SED1278F/D
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DESCRIPTION
The SED1278F/D is a dot matrix LCD controller/driver which is dedicated to character display. It is capable of
displaying up to 80 characters under 4-bit/8-bit MPU control.
The built-in character generator ROM has an extended capacity of 240 different characters, each being generated
in a 5
×
10 dots font compatible with a 1/11 duty. In addition, the SED1278F/D contains 64 bytes of character
generator RAM in which the user can store 8 different characters, each consisting of 558 dots. These memory
features offer high flexibility in character display.
The guaranteed minimum LCD driving voltage is 3V, and this makes the SED1278F/D suitable for driving low
voltage LCDs.
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FEATURES
G
Display RAM .............................. 80 bytes (80 characters)
G
Character generator ROM.......... 240 characters (Able to 256 characters)
G
Character generator RAM .......... 8 characters
G
Built-in CR oscillator, Built-in power-on reset circuit
G
Maximim display dimension ....... 40 characters52 lines, 80 characters51 line
(When accompanied with SED1181F
LA
/D
LA
, SED1681F
OA
/D
OA
)
G
1/8, 1/11 or 1/16 duty matirx drive (fixed by command)
G
2 flame AC wave-form drive
G
High-speed bus interface with 4-bit/8-bit MPU
G
Powerful display control instructions
G
Character ................................... 5
7 dots+Cursor line (5
8 dots also possible)
5
10 dots+Cursor line
G
6 Kinds of character font
G
Single power supply ................... 5V
±
10% (Logic)
G
Low LCD driving voltage ............ V
DD
—V
5
≥
.0V
G
Package ..................................... SED1278F: QFP5-80pin (plastic)
SED1278D: Die form (Al pad)
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BLOCK DIAGRAM
Instruction Decoder
M P X
M P X
M P X
Display Data RAM
DD RAM
80 Bytes
Character
Generator
RAM
(CGRAM)
64 Bytes
Character
Generator
RAM
(CGRAM)
5
10
240 Byts
Instruction Register
Refresh Address Counter
Address
Parallel/Serial
Shi40 Bits
La40 Bits
Segment Driving
Common Driving
Shift Register 16 Bits
Timing Generator
Oscillation
DB0
DB7
8
8
8
5
5
8
5
7
7
Cursor/
Data Register
I
I
E
R/W
RS
V
DD
V
SS
V1
V2
V3
V4
V5
OSC1 OSC2
XSCL
LP
FR
COM1
COM16
SEG1
SEG40
D0