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參數(shù)資料
| 型號： | SEMD4 |
| 廠商： | INFINEON TECHNOLOGIES AG |
| 英文描述： | NPN/PNP Silicon Digital Transistor Array Preliminary data |
| 中文描述： | npn型/進步黨硅數(shù)字晶體管陣列的初步數(shù)據(jù) |
| 文件頁數(shù)： | 1/5頁 |
| 文件大小： | 155K |
| 代理商： | SEMD4 |
SEMD4
Feb-26-2004
1
NPN/PNP Silicon Digital Transistor Array
Preliminary data
Switching circuit, inverter, interface circuit,
driver circuit
Two (galvanic) internal isolated NPN/PNP
Transistors in one package
Built in bias resistor (
R
1=10k
)
Tape loading orientation
1
3
6
5
4
2
1
2
3
4 5
6
Direction of Unreeling
Top View
Position in tape: pin 1
same of feed hole
side
W
Marking on SOT666 package
(for example W R)
corresponds to pin 1 of device
EHA07176
6
5
4
3
2
1
C1
B2
E2
C2
B1
E1
1
R
R
2
R
1
R
2
TR1
TR2
Type
SEMD4
Marking
W7
Pin Configuration
1=E1 2=B1 3=C2 4=E2 5=B2 6=C1 SOT666
Package
Maximum Ratings
Parameter
Collector-emitter voltage
Symbol
V
CEO
V
CBO
V
EBO
V
i(on)
I
C
P
tot
T
j
T
stg
Value
50
Unit
V
Collector-base voltage
50
Emitter-base voltage
5
Input on Voltage
20
DC collector current
100
250
mA
mW
Total power dissipation
,
T
S
= 75 °C
Junction temperature
150
°C
Storage temperature
-65 ... 150
Thermal Resistance
Junction - soldering point
1)
R
thJS
≤
300
K/W
1For calculation of
R
thJA
please refer to Application Note Thermal Resistance
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