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參數(shù)資料
| 型號(hào)： | SI5366-C-GQR |
| 廠商： | Silicon Laboratories Inc |
| 文件頁(yè)數(shù)： | 1/32頁(yè) |
| 文件大小： | 0K |
| 描述： | IC CLOCK MULTIPLIER PREC 100TQFP |
| 標(biāo)準(zhǔn)包裝： | 250 |
| 系列： | DSPLL® |
| 類(lèi)型： | 時(shí)鐘放大器，振動(dòng)衰減器 |
| PLL： | 是 |
| 輸入： | 時(shí)鐘 |
| 輸出： | CML，CMOS，LVDS，LVPECL |
| 電路數(shù)： | 1 |
| 比率 - 輸入:輸出： | 4:5 |
| 差分 - 輸入:輸出： | 是/是 |
| 頻率 - 最大： | 1.05GHz |
| 除法器/乘法器： | 無(wú)/是 |
| 電源電壓： | 1.71 V ~ 2.75 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類(lèi)型： | 表面貼裝 |
| 封裝/外殼： | 100-TQFP |
| 供應(yīng)商設(shè)備封裝： | 100-TQFP（14x14） |
| 包裝： | 帶卷 (TR) |
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Rev. 1.0 8/12
Copyright 2012 by Silicon Laboratories
Si5366
P RECISION C LOCK M ULTIPLIER/J ITTER A TTENUATOR
Features
Applications
Description
The Si5366 is a jitter-attenuating precision clock multiplier for high-speed
communication systems, including SONET OC-48/OC-192, Ethernet, and
Fibre Channel. The Si5366 accepts four clock inputs ranging from 8 kHz
to 707 MHz and generates five frequency-multiplied clock outputs ranging
from 8 kHz to 1050 MHz. The input clock frequency and clock
multiplication ratio are selectable from a table of popular SONET,
Ethernet, and Fibre Channel frequencies. The Si5366 is based on Silicon
Laboratories' 3rd-generation DSPLL technology, which provides any-
frequency synthesis and jitter attenuation in a highly integrated PLL
solution that eliminates the need for external VCXO and loop filter
components. The DSPLL loop bandwidth is digitally programmable,
providing jitter performance optimization at the application level.
Operating from a single 1.8, 2.5, or 3.3 V supply, the Si5366 is ideal for
providing clock multiplication and jitter attenuation in high performance
timing applications.
Selectable output frequencies
ranging from 8 kHz to 1050 MHz
Ultra-low jitter clock outputs
w/jitter generation as low as
0.3ps rms (12kHz–20MHz)
Integrated loop filter with
selectable loop bandwidth (60 Hz
to 8.4 kHz)
Meets OC-192 GR-253-CORE
jitter specifications
Four clock inputs w/manual or
automatically controlled hitless
switching
Five clock outputs with selectable
signal format (LVPECL, LVDS,
CML, CMOS)
SONET frame sync switching
and regeneration
Support for ITU G.709 FEC ratios
(255/238, 255/237, 255/236)
LOL, LOS, FOS alarm outputs
Pin-controlled output phase
adjust
Pin-programmable settings
On-chip voltage regulator for
1.8 ±5%, 2.5 V ±10%, or
3.3 V ±10% operation
Small size: 14 x 14 mm 100-pin
TQFP
Pb-free, RoHS-compliant
SONET/SDH OC-48/STM-16
and OC-192/STM-64 line cards
GbE/10GbE, 1/2/4/8/10G Fibre
Channel line cards
ITU G.709 line cards
Optical modules
Test and measurement
Synchronous Ethernet
Ordering Information:
See page 25.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SI5366-EVB | 制造商:Silicon Laboratories Inc 功能描述: |
| SI5367 | 制造商:SILABS 制造商全稱(chēng):SILABS 功能描述:レP-PROGRAMMABLE PRECISION CLOCK MULTIPLIER |
| Si5367/68-EVB | 功能描述:時(shí)鐘和定時(shí)器開(kāi)發(fā)工具 Si5367/Si5368 EVAL BOARD RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Modules 類(lèi)型:Clock Conditioners 工具用于評(píng)估:LMK04100B 頻率:122.8 MHz 工作電源電壓:3.3 V |
| Si5367A-B-GQ | 功能描述:時(shí)鐘合成器/抖動(dòng)清除器 uP-PROGRAMMABE CLK MULT 10 MHZ-1.4 GHZ RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| SI5367A-B-GQR | 制造商:Silicon Laboratories Inc 功能描述: |
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