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參數(shù)資料
| 型號(hào)： | SI5368C-C-GQ |
| 廠商： | Silicon Laboratories Inc |
| 文件頁(yè)數(shù)： | 1/92頁(yè) |
| 文件大小： | 0K |
| 描述： | IC CLK MULTIPLIER ATTEN 100TQFP |
| 標(biāo)準(zhǔn)包裝： | 90 |
| 系列： | DSPLL® |
| 類型： | 時(shí)鐘放大器，振動(dòng)衰減器 |
| PLL： | 是 |
| 輸入： | 時(shí)鐘 |
| 輸出： | CML，CMOS，LVDS，LVPECL |
| 電路數(shù)： | 1 |
| 比率 - 輸入:輸出： | 4:5 |
| 差分 - 輸入:輸出： | 是/是 |
| 頻率 - 最大： | 346MHz |
| 除法器/乘法器： | 無(wú)/是 |
| 電源電壓： | 1.71 V ~ 3.63 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 100-TQFP |
| 供應(yīng)商設(shè)備封裝： | 100-TQFP（14x14） |
| 包裝： | 托盤 |
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Rev. 1.0 8/12
Copyright 2012 by Silicon Laboratories
Si5368
A NY-F REQUENCY P RECISION C LOCK M ULTIPLIER/J ITTER
A TTENUATOR
Features
Applications
Description
The Si5368 is a jitter-attenuating precision clock multiplier for applications
requiring sub 1 ps rms jitter performance. The Si5368 accepts four clock
inputs ranging from 2 kHz to 710 MHz and generates five clock outputs
ranging from 2 kHz to 945 MHz and select frequencies to 1.4 GHz. The
device provides virtually any frequency translation combination across this
operating range. The outputs are divided down separately from a common
source. The Si5368 input clock frequency and clock multiplication ratio are
programmable through an I2C or SPI interface. The Si5368 is based on
Silicon Laboratories' third-generation DSPLL technology, which provides
any-frequency synthesis and jitter attenuation in a highly integrated PLL
solution that eliminates the need for external VCXO and loop filter
components. The DSPLL loop bandwidth is digitally programmable,
providing jitter performance optimization at the application level. Operating
from a single 1.8, 2.5 ,or 3.3 V supply, the Si5368 is ideal for providing
clock multiplication and jitter attenuation in high performance timing
applications.
Generates any frequency from
2 kHz to 945 MHz and select
frequencies to 1.4 GHz from an
input frequency of 2 kHz to
710 MHz
Ultra-low jitter clock outputs with
jitter generation as low as 300 fs
rms (12 kHz–20 MHz)
Integrated loop filter with selectable
loop bandwidth (60 Hz to 8.4 kHz)
Meets OC-192 GR-253-CORE jitter
specifications
Four clock inputs with manual or
automatically controlled hitless
switching and phase build-out
Small size: 14 x 14 mm 100-pin
TQFP
Supports holdover and freerun
modes of operation
Five clock outputs with
selectable signal format
(LVPECL, LVDS, CML, CMOS)
SONET frame sync switching
and regeneration
Support for ITU G.709 and
custom FEC ratios (253/226,
239/237, 255/238, 255/237,
255/236)
LOL, LOS, FOS alarm outputs
Digitally-controlled output phase
adjust
I2C or SPI programmable
settings
Pb-free, RoHS compliant
SONET/SDH OC-48/STM-16/OC-
192/STM-64 line cards
GbE/10GbE, 1/2/4/8/10/16G Fibre
Channel
ITU G.709 and custom FEC line
cards
Wireless basestations
Data converter clocking
OTN/WDM Muxponder, MSPP,
ROADM line cards
SONET/SDH + PDH clock
synthesis
Test and measurement
Synchronous Ethernet
Broadcast video
Ordering Information:
See page 79.
Pin Assignments
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
31
30
29
28
27
26
32
64
61
62
63
57
58
59
60
50
51
52
53
54
55
56
49
NC
ALIGN
C2B
GND
C1B
C3B
XA
XB
VDD
CK
IN
3
+
CK
IN
3
–
RA
TE
0
CK
IN
1
+
CK
IN
1
–
CK
IN
2
+
CK
IN
2
–
RA
TE
1
CK
IN
4
+
CK
IN
4
–
LO
L
SDI
NC
A1
A0
GND
VDD
SDA_SDO
SCL
C2A
C1A
CS1_C4A
NC
DEC
INC
CK
O
UT
3
+
CM
O
D
E
CK
O
UT
3
–
NC
CK
O
UT
1
+
CK
O
UT
1
–
FS
_
O
U
T+
FS
_
O
U
T–
VD
D
CK
O
UT
2
+
CK
O
UT
2
–
NC
CK
O
UT
4
+
NC
CK
O
UT
4
–
17
20
19
18
24
23
22
21
25
74
73
72
71
70
69
68
67
66
65
75
100
89
90
91
92
93
94
95
96
97
98
99
76
77
78
79
80
81
82
83
84
85
86
87
88
RST
NC
VDD
GND
0_C3A
GND
NC
GN
D
VD
D
GN
D
GN
D
GN
D
GN
D
GN
D
GN
D
GN
D
GN
D
VDD
A2_SS
GND
NC
VD
D
VD
D
VD
D
VD
D
VD
D
VD
D
VD
D
VD
D
VD
D
VD
D
NC
VDD
NC
Si5368
GND PAD
T_ALM
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SI5368C-C-GQR | 功能描述:時(shí)鐘合成器/抖動(dòng)清除器 Precision Clk Xplier Jitter Attn 4In/5Out RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| SI5368-EVB | 制造商:Silicon Laboratories Inc 功能描述: |
| Si5369A-C-GQ | 功能描述:時(shí)鐘發(fā)生器及支持產(chǎn)品 LW LOOP BW AR CLK MULT/JITTER 4IN 5OUT RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56 |
| SI5369A-C-GQR | 功能描述:時(shí)鐘發(fā)生器及支持產(chǎn)品 Lo Loop BW Clk Multi Jitter Attn 4In/5Out RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56 |
| Si5369B-C-GQ | 功能描述:時(shí)鐘發(fā)生器及支持產(chǎn)品 LW LOOP BW AR CLK MULT/JITTER 4IN 5OUT RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56 |
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