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參數(shù)資料
| 型號(hào)： | SK100EL14W |
| 廠商： | Semtech Corporation |
| 英文描述： | 1:5 Clock Distribution Chip |
| 中文描述： | 1:5時(shí)鐘分配芯片 |
| 文件頁數(shù)： | 1/4頁 |
| 文件大小： | 91K |
| 代理商： | SK100EL14W |
Revision 1/February 12, 2001
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The SK10/100EL14W is a 1:5 Clock Distribution Chip
designed specifically for low skew clock distribution
applications. This device is fully compatible with
MC100EL14 and MC100LVEL14.
The device can be driven by either differential or single-
ended ECL/PECL input signals. The SK10/100EL14W
provides a V
BB
output for either single-ended use or DC
bias for AC coupling to the device. V
BB
is an output pin
and should be used as a bias for the EL14W as its current
sink/source capability is limited. Whenever used, V
BB
should be bypassed to VCC via a 0.01 μF capacitor.
The EL14W features a multiplexed clock input to allow for
the distribution of a lower speed scan or test clock along
with the high speed system clock. When LOW (or left
open and pulled LOW by the input pulldown resistor) the
SEL pin will select the differential clock input. The Common
Enable pin (EN*) is synchronous so that the outputs will
only be enabled/disabled when they are already in the
LOW state. This avoids the chance of generating a runt
clock pulse when the device is enabled/disabled as can
happen with an asynchronous control. The internal flip-
flops are clocked on the falling edge of the input clock;
therefore, all associated specification limits are referenced
to the negative edge of the clock input.
Extended Supply Voltage Range: (VEE = –5.5V to
–3.0V, VCC = 0V) or (VCC = + 3.0V to +5.5V,
VEE=0V)
High Bandwidth Output Transition
Max. 50 ps Output-to-Output Skew (Typ. 30 ps)
V
BB
Output
Synchronous Enable/Disable
Multiplexed Clock Input
75 K
Internal Input Pulldown Resistors
New Differential Input Common Mode Range
Fully Compatible with MC100EL14 and
MC100LVEL14
ESD Protection of >4000 V
Industrial Temperature Range: –40
o
C to +85
o
C
Available in 20-Pin SOIC (150 mils) Package
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Function Table
Q0
Q1*
Q0*
Q2
Q2*
Q3
Q4
Q4*
Q1
Q3*
VCC
CLK*
EN*
CLK
VBB
SEL
VEE
VCC
NC
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
D
Q
1
0
SCLK
!
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SK10EL14WU | 1:5 Clock Distribution Chip |
| SK100EL14WU | 1:5 Clock Distribution Chip |
| SK10EL14WD | SNAP LOCK CABLE MARKER - O (10PK) |
| SK100EL14WD | SNAP LOCK CABLE MARKER - P |
| SK10EL14WDT | SNAP LOCK CABLE MARKER - Q |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SK100EL14WD | 制造商:SEMTECH 制造商全稱:Semtech Corporation 功能描述:1:5 Clock Distribution Chip |
| SK100EL14WDT | 制造商:SEMTECH 制造商全稱:Semtech Corporation 功能描述:1:5 Clock Distribution Chip |
| SK100EL14WU | 制造商:SEMTECH 制造商全稱:Semtech Corporation 功能描述:1:5 Clock Distribution Chip |
| SK100EL15W | 制造商:SEMTECH 制造商全稱:Semtech Corporation 功能描述:1:4 Clock Distribution |
| SK100EL15WD | 制造商:SEMTECH 制造商全稱:Semtech Corporation 功能描述:1:4 Clock Distribution |
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