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參數資料
| 型號： | SM320C30HFGM50 |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 數字信號處理 |
| 英文描述： | 32-BIT, 50 MHz, OTHER DSP, CQFP196 |
| 封裝： | NONCONDUCTIVE TIE BAR, CERAMIC, QFP-196 |
| 文件頁數： | 1/48頁 |
| 文件大小： | 874K |
| 代理商： | SM320C30HFGM50 |
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SMJ320C30
DIGITAL SIGNAL PROCESSOR
SGUS014H -- FEBRUARY 1991 -- REVISED JUNE 2004
1
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251--1443
2
D
--55°C to 125°C Operating Temperature
Range, QML Processing
D
Processed to MIL-PRF-38535 (QML)
D
Performance
-- SMJ320C30-40 (50-ns Cycle)
40 MFLOPS
20 MIPS
-- SMJ320C30-50 (40-ns Cycle)
50 MFLOPS
25 MIPS
D
Two 1K-Word × 32-Bit Single-Cycle
Dual-Access On-Chip RAM Blocks
D
Validated Ada Compiler
D
64-Word × 32-Bit Instruction Cache
D
32-Bit Instruction and Data Words,
24-Bit Addresses
D
40/32-Bit Floating-Point/Integer Multiplier
and Arithmetic Logic Unit (ALU)
D
Parallel ALU and Multiplier Execution in a
Single Cycle
D
On-Chip Direct Memory Access (DMA)
Controller for Concurrent I/O and CPU
Operation
D
Integer, Floating-Point, and Logical
Operations
D
One 4K-Word × 32-Bit Single-Cycle
Dual-Access On-Chip ROM Block
D
Two 32-Bit External Ports
(24- and 13-Bit Address)
D
Two Serial Ports With Support for
8-/16-/24-/32-Bit Transfers
D
Packaging
-- 181-Pin Grid Array Ceramic Package
(GB Suffix)
-- 196-Pin Ceramic Quad Flatpack With
Nonconductive Tie-Bar (HFG Suffix)
D
SMD Approval for 40- and 50-MHz Versions
D
Two Address Generators With Eight
Auxiliary Registers and Two Auxiliary
Register Arithmetic Units (ARAUs)
D
Zero-Overhead Loops With Single-Cycle
Branches
D
Interlocked Instructions for
Multiprocessing Support
D
32-Bit Barrel Shifter
D
Eight Extended-Precision Registers
(Accumulators)
D
Two- and Three-Operand Instructions
D
Conditional Calls and Returns
D
Block Repeat Capability
D
Fabricated Using Enhanced Performance
Implanted CMOS (EPICt) by Texas
Instruments
D
Two 32-Bit Timers
description
The SMJ320C30 internal busing and special digital signal processor (DSP) instruction set has the speed and
flexibility to execute up to 50 MFLOPS. The SMJ320C30 device optimizes speed by implementing functions
in hardware that other processors implement through software or microcode. This hardware-intensive approach
provides performance previously unavailable on a single chip. The emphasis on total system cost has resulted
in a less expensive processor that can be designed into systems currently using costly bit-slice processors.
D
SMJ320C30-40: 50-ns single-cycle execution time, 5% supply
D
SMJ320C30-50: 40-ns single-cycle execution time, 5% supply
Copyright 2004, Texas Instruments Incorporated
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
EPIC is a trademark of Texas Instruments Incorporated.
On products compliant to MIL-PRF-38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
相關PDF資料 |
PDF描述 |
|---|---|
| SM320C31GFM27 | 32-BIT, 27 MHz, OTHER DSP, CPGA141 |
| SM320C30HUM25 | 32-BIT, 25 MHz, OTHER DSP, CQFP196 |
| SM320C30HTM28 | 32-BIT, 28 MHz, OTHER DSP, CQFP196 |
| SM320C30HFGM25 | 32-BIT, 25 MHz, OTHER DSP, CQFP196 |
| SM320C30HFGM28 | 32-BIT, 28 MHz, OTHER DSP, CQFP196 |
相關代理商/技術參數 |
參數描述 |
|---|---|
| SM320C31 WAF | 制造商:Texas Instruments 功能描述: |
| SM320C31GFAM40 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:DIGITAL SIGNAL PROCESSORS |
| SM320C31GFAM50 | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Texas Instruments 功能描述:DSP FLOATING PT 32BIT 50MHZ 25MIPS 141CPGA - Trays |
| SM320C31GFAS60 | 制造商:Texas Instruments 功能描述:3RD GENERATION DSP, 60 MHZ - Trays |
| SM320C31HFGM40 | 制造商:Texas Instruments 功能描述:DSP FLOATING PT 32BIT 40MHZ 20MIPS 132CFPAK - Trays |
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