欧美成人免费电影,国产欧美一区二区三区精品酒店,精品国产a毛片,色网在线免费观看

參數資料
型號： SM320C6416DGADW60
廠商： TEXAS INSTRUMENTS INC
元件分類： 數字信號處理
英文描述： 64-BIT, 75 MHz, OTHER DSP, CPGA570
封裝： 33 X 33 MM, CERAMIC, FCPGA-570
文件頁數： 1/134頁
文件大小： 1997K
代理商： SM320C6416DGADW60
SMJ320C6414, SMJ320C6415, SMJ320C6416
FIXEDPOINT DIGITAL SIGNAL PROCESSORS
SGUS050A JANUARY 2004 REVISED MARCH 2004
1
POST OFFICE BOX 1443
HOUSTON, TEXAS 772511443
D Highest-Performance Fixed-Point Digital
Signal Processors (DSPs)
2-, 1.67-, 1.39-ns Instruction Cycle Time
600-MHz Clock Rate
Eight 32-Bit Instructions/Cycle
Twenty-Eight Operations/Cycle
4800 MIPS
Fully Software-Compatible With C62x
C6414/15/16 Devices Pin-Compatible
D VelociTI.2 Extensions to VelociTI
Advanced Very-Long-Instruction-Word
(VLIW) TMS320C64x
DSP Core
Eight Highly Independent Functional
Units With VelociTI.2
Extensions:
Six ALUs (32-/40-Bit), Each Supports
Single 32-Bit, Dual 16-Bit, or Quad
8-Bit Arithmetic per Clock Cycle
Two Multipliers Support
Four 16 x 16-Bit Multiplies
(32-Bit Results) per Clock Cycle or
Eight 8 x 8-Bit Multiplies
(16-Bit Results) per Clock Cycle
Non-Aligned Load-Store Architecture
64 32-Bit General-Purpose Registers
Instruction Packing Reduces Code Size
All Instructions Conditional
D Instruction Set Features
Byte-Addressable (8-/16-/32-/64-Bit Data)
8-Bit Overflow Protection
Bit-Field Extract, Set, Clear
Normalization, Saturation, Bit-Counting
VelociTI.2
Increased Orthogonality
D Viterbi Decoder Coprocessor (VCP) [C6416]
Supports Over 500 7.95-Kbps AMR
Programmable Code Parameters
D Turbo Decoder Coprocessor (TCP) [C6416]
Supports up to Six 2-Mbps 3GPP
(6 Iterations)
Programmable Turbo Code and
Decoding Parameters
D L1/L2 Memory Architecture
128K-Bit (16K-Byte) L1P Program Cache
(Direct Mapped)
128K-Bit (16K-Byte) L1D Data Cache
(2-Way Set-Associative)
8M-Bit (1024K-Byte) L2 Unified Mapped
RAM/Cache (Flexible Allocation)
D Two External Memory Interfaces (EMIFs)
One 64-Bit (EMIFA), One 16-Bit (EMIFB)
Glueless Interface to Asynchronous
Memories (SRAM and EPROM) and
Synchronous Memories (SDRAM,
SBSRAM, ZBT SRAM, and FIFO)
1280M-Byte Total Addressable External
Memory Space
D Enhanced Direct-Memory-Access (EDMA)
Controller (64 Independent Channels)
D Host-Port Interface (HPI)
User-Configurable Bus Width (32-/16-Bit)
D 32-Bit/33-MHz, 3.3-V PCI Master/Slave
Interface Conforms to PCI Specification 2.2
[C6415/C6416 ]
Three PCI Bus Address Registers:
Prefetchable Memory
Non-Prefetchable Memory I/O
Four-Wire Serial EEPROM Interface
PCI Interrupt Request Under DSP
Program Control
DSP Interrupt Via PCI I/O Cycle
D Three Multichannel Buffered Serial Ports
Direct Interface to T1/E1, MVIP, SCSA
Framers
Up to 256 Channels Each
ST-Bus-Switching-, AC97-Compatible
Serial Peripheral Interface (SPI)
Compatible (Motorola
)
D Three 32-Bit General-Purpose Timers
D Universal Test and Operations PHY
Interface for ATM (UTOPIA) [C6415/C6416]
UTOPIA Level 2 Slave ATM Controller
8-Bit Transmit and Receive Operations
up to 50 MHz per Direction
User-Defined Cell Format up to 64 Bytes
D Sixteen General-Purpose I/O (GPIO) Pins
D Flexible PLL Clock Generator
D IEEE-1149.1 (JTAG)
Boundary-Scan-Compatible
D 570-Pin Grid Array (PGA) Package (GAD
Suffix)
D 0.13-m/6-Level Cu Metal Process (CMOS)
D 3.3-V I/Os, 1.4-V Internal
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright
2004, Texas Instruments Incorporated
C62x, VelociTI.2, VelociTI, and TMS320C64x are trademarks of Texas Instruments.
Motorola is a trademark of Motorola, Inc.
IEEE Standard 1149.1-1990 Standard-Test-Access Port and Boundary Scan Architecture.
On products compliant to MILPRF38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
相關PDF資料
PDF描述
SMJ320C6701GLPW16 32-BIT, 166.66 MHz, OTHER DSP, CBGA429
SMJ34010-50FDM GRAPHICS PROCESSOR, CQCC68
SMJ34010-40GBM GRAPHICS PROCESSOR, CPGA68
SMJ34010FDM GRAPHICS PROCESSOR, CQCC68
SMJ9914AFDS IEEE 488 (GPIB) BUS CONTROLLER, CQCC44
相關代理商/技術參數
參數描述
SM320C6424GDUQ6EP 功能描述:數字信號處理器和控制器 - DSP, DSC EP Fixed-Pt Dig Signal Proc RoHS:否 制造商:Microchip Technology 核心:dsPIC 數據總線寬度:16 bit 程序存儲器大小:16 KB 數據 RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數量:35 定時器數量:3 設備每秒兆指令數:50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風格:SMD/SMT
SM320C6455BGTZEP 功能描述:數字信號處理器和控制器 - DSP, DSC Enh Product Fixed- Pt Dig Signal Proc RoHS:否 制造商:Microchip Technology 核心:dsPIC 數據總線寬度:16 bit 程序存儲器大小:16 KB 數據 RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數量:35 定時器數量:3 設備每秒兆指令數:50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風格:SMD/SMT
SM320C6455BGTZSEP 功能描述:數字信號處理器和控制器 - DSP, DSC Enh Product Fixed- Pt Dig Signal Proc RoHS:否 制造商:Microchip Technology 核心:dsPIC 數據總線寬度:16 bit 程序存儲器大小:16 KB 數據 RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數量:35 定時器數量:3 設備每秒兆指令數:50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風格:SMD/SMT
SM320C6455-EP 制造商:TI 制造商全稱:Texas Instruments 功能描述:FIXED-POINT DIGITAL SIGNAL PROCESSOR
SM320C6472EGTZA6 功能描述:數字信號處理器和控制器 - DSP, DSC Fixed-Pt Dig Sig Proc RoHS:否 制造商:Microchip Technology 核心:dsPIC 數據總線寬度:16 bit 程序存儲器大小:16 KB 數據 RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數量:35 定時器數量:3 設備每秒兆指令數:50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風格:SMD/SMT
發布緊急采購，3分鐘左右您將得到回復。

采購需求

(若只采購一條型號，填寫一行即可)

發布成功！您可以繼續發布采購。也可以進入我的后臺，查看報價

發布成功！您可以繼續發布采購。也可以進入我的后臺，查看報價

*型號 *數量 廠商 批號 封裝
添加更多采購

我的聯系方式

*
*
*
主站蜘蛛池模板： 嘉峪关市| 潼南县| 赣榆县| 奇台县| 武安市| 郧西县| 湖南省| 广汉市| 平武县| 洮南市| 霍邱县| 宝鸡市| 祁东县| 怀安县| 盐津县| 嵊泗县| 永善县| 龙泉市| 开阳县| 榆树市| 烟台市| 板桥市| 成都市| 马公市| 原平市| 即墨市| 松滋市| 宁化县| 炉霍县| 泰来县| 松原市| 牡丹江市| 镇平县| 梁河县| 佛山市| 巫山县| 龙井市| 红桥区| 临洮县| 兴山县| 东光县|