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參數資料
| 型號： | SME5224AUPA-360 |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 64-BIT, 360 MHz, RISC PROCESSOR |
| 文件頁數： | 1/28頁 |
| 文件大小： | 373K |
| 代理商： | SME5224AUPA-360 |
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SME5224AUPA-360
UltraSPARC-II CPU Module
360 MHz CPU, 4.0 MB E-Cache
MODULE DESCRIPTION
The UltraSPARC–II, 360 MHz CPU, 4.0 Mbyte E-cache module, (SME5224AUPA-360) delivers high perfor-
mance computing in a compact design. Based on the UltraSPARC-II CPU, this module is designed using a
small form factor board with an integrated external cache. It connects to the high bandwidth
Ultra Port Architecture (UPA) bus via a high speed sturdy connector. The UltraSPARC–II, 360 MHz CPU,
4.0 Mbyte E-cache module, can plug into any UPA connector, saving system design costs and reducing the
production time for new systems.
Heatsinks are attached to components on the module board. The module board is encased in a plastic shroud.
The purpose of this shroud is to protect the components and channel airow. The module design is geared
towards ease of upgrade and eld support.
Module Features
Module Benets
Ease of System Design
Small form factor board with integrated external cache
and UPA interface
JTAG boundary scan and performance instrumentation
PCB provides a multi-power plane bypass, facilitating
efcient motherboard design
Performance
High performance UltraSPARC CPU at 360 MHz
Four megabytes of external cache using high speed
register-latch SRAMs
Dedicated high bandwidth bus to processor
Glueless MP Support
Implements the high performance UPA interface
Supports up to 16 Mbyte of external cache in a
four-way MP system
Simplify System Qualications by
Complying with Industry and
Government Standards
Backwards compatibility with systems implementing a
UPA interface
Plastic shroud protects components and channels
airow
Multi-layer PCB controls EMI radiation
Edge connectors and ejectors
Small form factor board encased in a heat resistant
shroud
On-board voltage regulator accepts 2.6 volts for the
Vdd_core; compatible with existing systems
July 1999
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