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參數資料
型號: SN54HC138W
廠商: TEXAS INSTRUMENTS INC
元件分類: 編、解碼器及復用、解復用
英文描述: HC/UH SERIES, OTHER DECODER/DRIVER, INVERTED OUTPUT, CDFP16
封裝: CERAMIC, FP-16
文件頁數: 1/12頁
文件大?。?/td> 192K
代理商: SN54HC138W
SN54HC138, SN74HC138
3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS
SCLS107C – DECEMBER 1982 – REVISED MAY 1997
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
D Designed Specifically for High-Speed
Memory Decoders and Data Transmission
Systems
D Incorporate Three Enable Inputs to Simplify
Cascading and/or Data Reception
D Package Options Include Plastic
Small-Outline (D), Thin Shrink
Small-Outline (PW), and Ceramic Flat (W)
Packages, Ceramic Chip Carriers (FK), and
Standard Plastic (N) and Ceramic (J)
300-mil DIPs
description
The ’HC138 are designed to be used in
high-performance memory-decoding or data-
routing
applications
requiring
very
short
propagation delay times. In high-performance
memory systems, these decoders can be used to
minimize the effects of system decoding. When
employed with high-speed memories utilizing a
fast enable circuit, the delay times of these
decoders and the enable time of the memory are
usually less than the typical access time of the
memory. This means that the effective system
delay introduced by the decoders is negligible.
The conditions at the binary-select inputs at the
three enable inputs select one of eight output
lines. Two active-low and one active-high enable
inputs reduce the need for external gates or
inverters when expanding. A 24-line decoder can
be implemented without external inverters and a
32-line decoder requires only one inverter. An
enable input can be used as a data input for
demultiplexing applications.
The SN54HC138 is characterized for operation over the full military temperature range of –55
°C to 125°C. The
SN74HC138 is characterized for operation from –40
°C to 85°C.
32 1 20 19
910 11 1213
4
5
6
7
8
18
17
16
15
14
Y1
Y2
NC
Y3
Y4
C
G2A
NC
G2B
G1
B
A
NC
Y6
Y5
V
Y0
Y7
GND
NC
SN54HC138 ...FK PACKAGE
(TOP VIEW)
CC
NC – No internal connection
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
A
B
C
G2A
G2B
G1
Y7
GND
VCC
Y0
Y1
Y2
Y3
Y4
Y5
Y6
SN54HC138 ...J OR W PACKAGE
SN74HC138 . . . D, N, OR PW PACKAGE
(TOP VIEW)
Copyright
1997, Texas Instruments Incorporated
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
相關PDF資料
PDF描述
SN54HC148WR HC/UH SERIES, 8-BIT ENCODER, CDFP16
SN54HC160J-00 HC/UH SERIES, SYN POSITIVE EDGE TRIGGERED 4-BIT UP DECADE COUNTER, CDIP16
SNJ54HC162FK-00 HC/UH SERIES, SYN POSITIVE EDGE TRIGGERED 4-BIT UP DECADE COUNTER, CQCC20
SN74HC163N-10 HC/UH SERIES, SYN POSITIVE EDGE TRIGGERED 4-BIT UP BINARY COUNTER, PDIP16
SN54HC161J-00 HC/UH SERIES, SYN POSITIVE EDGE TRIGGERED 4-BIT UP BINARY COUNTER, CDIP16
相關代理商/技術參數
參數描述
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