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參數資料
| 型號： | SN54LS07 |
| 廠商： | Texas Instruments, Inc. |
| 元件分類： | 基準電壓源/電流源 |
| 英文描述： | Quad 2-Input NOR Gate; Package: TSSOP-14; No of Pins: 14; Container: Tape and Reel; Qty per Container: 2500 |
| 中文描述： | 十六進制緩沖器/配合開放的驅動集電極高壓輸出 |
| 文件頁數： | 1/4頁 |
| 文件大小： | 36K |
| 代理商： | SN54LS07 |
SN54LS07, SN74LS07, SN74LS17
HEX BUFFERS/DRIVERS WITH
OPEN-COLLECTOR HIGH-VOLTAGE OUTPUTS
SDLS021A, D3517, MAY 1990–REVISED AUGUST 1991
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
Copyright
1991, Texas Instruments Incorporated
1
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Converts TTL-Voltage Levels to MOS
Levels
High Sink-Current Capability
Input Clamping Diodes Simplify System
Design
Open-Collector Driver for Indicator Lamps
and Relays
Package Options Include “Small Outline”
Packages, Ceramic Chip Carriers, and
Standard and Ceramic 300-mil DIPs
description
These monolithic hex buffers/drivers feature
high-voltage open-collector outputs to interface
with high-level circuits or for driving high-current
loads. They are also characterized for use as
buffers for driving TTL inputs. The
′
LS07 has a
rated output voltage of 30 V and the
′
LS17 has a
rated output voltage of 15 V. The maximum sink
current is 30 mA for the SN54LS07 and 40 mA for
the SN74LS07 and SN74LS17.
These circuits are compatible with most TTL
families. Inputs are diode-clamped to minimize
transmission-line effects, which simplifies design.
Typical power dissipation is 140 mW and average
propagation delay time is 12 ns.
The SN54LS07 is characterized over the full military temperature range of –55
°
C to 125
°
C. The SN74LS07 and
SN74LS17 are characterized for operation from 0
°
C to 70
°
C.
logic symbol
logic diagram (positive logic)
1Y
2
1
1A
2Y
4
3Y
6
4Y
8
5Y
10
6Y
12
3
2A
5
3A
9
4A
11
5A
13
6A
1A
2A
3A
4A
5A
6A
1Y
2Y
3Y
4Y
5Y
6Y
This symbol is in accordance with ANSI/IEEE Std 91-1984 and
IEC Publication 617-12.
Pin numbers shown are for D, J, and N packages.
1
3
5
9
11
13
2
4
6
8
10
12
1
2
3
4
5
6
7
14
13
12
11
10
9
8
1A
1Y
2A
2Y
3A
3Y
GND
V
CC
6A
6Y
5A
5Y
4A
4Y
SN54LS07 . . . J PACKAGE
SN74LS07, SN74LS17 . . . D OR N PACKAGE
(T0P VIEW)
3
2
1 20 19
9 10 11 12 13
4
5
6
7
8
18
17
16
15
14
6Y
NC
5A
NC
5Y
2A
NC
2Y
NC
3A
SN54LS07 . . . FK PACKAGE
(T0P VIEW)
1
1
N
4
4
6
3
G
N
NC – No internal connection
V
C
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