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參數(shù)資料
| 型號(hào)： | SN54LS161J |
| 廠商： | Motorola, Inc. |
| 元件分類： | 通用總線功能 |
| 英文描述： | BCD DECADE COUNTERS/ 4-BIT BINARY COUNTERS |
| 中文描述： | BCD碼十年計(jì)數(shù)器/ 4位二進(jìn)制計(jì)數(shù)器 |
| 文件頁數(shù)： | 1/6頁 |
| 文件大小： | 79K |
| 代理商： | SN54LS161J |
5-1
FAST AND LS TTL DATA
BCD DECADE COUNTERS/
4-BIT BINARY COUNTERS
The LS160A/161A/162A/163A are high-speed 4-bit synchronous count-
ers. They are edge-triggered, synchronously presettable, and cascadable
MSI building blocks for counting, memory addressing, frequency division and
other applications. The LS160A and LS162A count modulo 10 (BCD). The
LS161A and LS163A count modulo 16 (binary.)
The LS160A and LS161A have an asynchronous Master Reset (Clear)
input that overrides, and is independent of, the clock and all other control
inputs. The LS162A and LS163A have a Synchronous Reset (Clear) input that
overrides all other control inputs, but is active only during the rising clock
edge.
BCD (Modulo 10)
Binary (Modulo 16)
Asynchronous Reset
LS160A
LS161A
Synchronous Reset
LS162A
LS163A
Synchronous Counting and Loading
Two Count Enable Inputs for High Speed Synchronous Expansion
Terminal Count Fully Decoded
Edge-Triggered Operation
Typical Count Rate of 35 MHz
ESD > 3500 Volts
CONNECTION DIAGRAM DIP
(TOP VIEW)
NOTE:
The Flatpak version
has the same pinouts
(Connection Diagram) as
the Dual In-Line Package.
14
13
12
11
10
9
1
2
3
4
5
P2
6
P3
7
16
15
8
VCC
*R
TC
Q0
Q1
Q2
CET
Q3
PE
CP
P0
P1
CEP
GND
*MR for LS160A and LS161A
*SR for LS162A and LS163A
PIN NAMES
LOADING
(Note a)
HIGH
LOW
PE
P0–P3
CEP
CET
CP
MR
SR
Q0–Q3
TC
Parallel Enable (Active LOW) Input
Parallel Inputs
Count Enable Parallel Input
Count Enable Trickle Input
Clock (Active HIGH Going Edge) Input
Master Reset (Active LOW) Input
Synchronous Reset (Active LOW) Input
Parallel Outputs (Note b)
Terminal Count Output (Note b)
1.0 U.L.
0.5 U.L.
0.5 U.L.
1.0 U.L.
0.5 U.L.
0.5 U.L.
1.0 U.L.
10 U.L.
10 U.L.
0.5 U.L.
0.25 U.L.
0.25 U.L.
0.5 U.L.
0.25 U.L.
0.25 U.L.
0.5 U.L.
5 (2.5) U.L.
5 (2.5) U.L.
NOTES:
a) 1 TTL Unit Load (U.L.) = 40
μ
A HIGH/1.6 mA LOW.
b) The Output LOW drive factor is 2.5 U.L. for Military (54) and 5 U.L. for Commercial (74)
Temperature Ranges.
SN54/74LS160A
SN54/74LS161A
SN54/74LS162A
SN54/74LS163A
BCD DECADE COUNTERS/
4-BIT BINARY COUNTERS
LOW POWER SCHOTTKY
J SUFFIX
CERAMIC
CASE 620-09
N SUFFIX
PLASTIC
CASE 648-08
16
1
16
1
ORDERING INFORMATION
SN54LSXXXJ
SN74LSXXXN
SN74LSXXXD
Ceramic
Plastic
SOIC
16
1
D SUFFIX
SOIC
CASE 751B-03
LOGIC SYMBOL
VCC = PIN 16
GND = PIN 8
9
3
4
5
6
7
10
2
15
1
14 13
12
11
PE P0P1
CEP
P2P3
CET
CP*R Q0Q1Q2Q3
TC
*MR for LS160A and LS161A
*SR for LS162A and LS163A
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SN54LS162J | BCD DECADE COUNTERS/ 4-BIT BINARY COUNTERS |
| SN74LS160D | Reference Design kit for ADNS-6000 |
| SN74LS160N | Reference Design kit for ADNS-5020 |
| SN74LS161D | Optical Mouse Sample Kit |
| SN74LS161N | Optical Mouse Sample Kit |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SN54LS162W | 制造商:Texas Instruments 功能描述: |
| SN54LS163AJ | 制造商:Texas Instruments 功能描述:Counter Single 4-Bit Sync Binary UP 16-Pin CDIP Tube 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Texas Instruments 功能描述:SYNC 4-BIT BINARY COUNTER - Rail/Tube 制造商:Motorola Inc 功能描述:Counter, Up, 4 Bit Binary, 16 Pin, Ceramic, DIP |
| SN54LS164J | 制造商:Texas Instruments 功能描述:Shift Register Single 8-Bit Serial to Parallel 14-Pin CDIP Tube 制造商:Texas Instruments 功能描述:SHIFT REGISTER SGL 8BIT SERL TO PARALLEL 14CDIP - Rail/Tube |
| SN54LS165AJ | 制造商:Rochester Electronics LLC 功能描述: 制造商:Texas Instruments 功能描述: 制造商:Texas Instruments 功能描述:8-BIT PISO SHIFT REGISTER - Rail/Tube 制造商:Texas Instruments 功能描述:Shift Register Single 8-Bit Serial/Parallel to Serial 16-Pin CDIP Tube |
| SN54LS165J | 制造商:Texas Instruments 功能描述: 制造商:Texas Instruments 功能描述:Shift Register, 16 Pin, Ceramic, DIP |
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