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參數資料
| 型號： | SN74ALS646A-1DW |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 總線收發器 |
| 英文描述： | ALS SERIES, 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO24 |
| 封裝： | PLASTIC, SO-24 |
| 文件頁數： | 1/28頁 |
| 文件大小： | 658K |
| 代理商： | SN74ALS646A-1DW |
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OE
B1
B2
NC
B3
B4
B5
A1
A2
A3
NC
A4
A5
A6
DIR
SAB
CLKAB
B8
B7
A8
GND
NC
CLKBA
SBA
V
A7
B6
17 18
27 26
NC – No internal connection
CC
CLKAB
SAB
DIR
A1
A2
A3
A4
A5
A6
A7
A8
GND
VCC
CLKBA
SBA
OE
B1
B2
B3
B4
B5
B6
B7
B8
1
2
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SN54ALS646, SN54ALS648, SN54AS646 . . . JT PACKAGE
SN74ALS646A, SN74ALS648A, SN74AS646,
SN74AS648 . . . DW OR NT PACKAGE
(TOP VIEW)
SN54ALS646, SN54ALS648, SN54AS646 . . . FK PACKAGE
(TOP VIEW)
SN54ALS646, SN54ALS648, SN54AS646
SN74ALS646A, SN74ALS648A, SN74AS646, SN74AS648
OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS
SDAS039F – DECEMBER 1983 – REVISED JANUARY 1995
Copyright
1995, Texas Instruments Incorporated
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
Independent Registers for A and B Buses
Multiplexed Real-Time and Stored Data
Choice of True or Inverting Data Paths
Choice of 3-State or Open-Collector
Outputs
Package Options Include Plastic
Small-Outline (DW) Packages, Ceramic
Chip Carriers (FK), and Standard Plastic
(NT) and Ceramic (JT) 300-mil DIPs
DEVICE
OUTPUT
LOGIC
SN54ALS646, SN74ALS646A,
′AS646
3 state
True
SN54ALS648, SN74ALS648A, SN74AS648
3 state
Inverting
description
These devices consist of bus-transceiver circuits
with 3-state or open-collector outputs, D-type
flip-flops, and control circuitry arranged for
multiplexed transmission of data directly from the
data bus or from the internal storage registers.
Data on the A or B bus is clocked into the registers
on the low-to-high transition of the appropriate
clock
(CLKAB
or
CLKBA)
input. Figure 1
illustrates the four fundamental bus-management
functions that can be performed with the octal bus
transceivers and registers.
Output-enable (OE) and direction-control (DIR)
inputs control the transceiver functions. In the
transceiver mode, data present at the high-
impedance port may be stored in either or both
registers.
The select-control (SAB and SBA) inputs can
multiplex stored and real-time (transparent mode)
data. The circuitry used for select control eliminates the typical decoding glitch that occurs in a multiplexer during
the transition between stored and real-time data. DIR determines which bus receives data when OE is low. In
the isolation mode (OE high), A data may be stored in one register and /or B data may be stored in the other
register.
When an output function is disabled, the input function is still enabled and can be used to store and transmit
data. Only one of the two buses, A or B, may be driven at a time.
The -1 version of the SN74ALS646A is identical to the standard version, except that the recommended
maximum IOL in the -1 version is increased to 48 mA. There are no -1 versions of the SN54ALS646,
SN54ALS648, or SN74ALS648A.
The SN54ALS646, SN54ALS648, and SN54AS646 are characterized for operation over the full military
temperature range of – 55
°C to 125°C. The SN74ALS646A, SN74ALS648A, SN74AS646, and SN74AS648 are
characterized for operation from 0
°C to 70°C.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
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| SN74ALS648ADWRE4 | ALS SERIES, 8-BIT REGISTERED TRANSCEIVER, INVERTED OUTPUT, PDSO24 |
| SN74ALS651ADWRE4 | ALS SERIES, 8-BIT REGISTERED TRANSCEIVER, INVERTED OUTPUT, PDSO24 |
| SN74ALS651ADWR | ALS SERIES, 8-BIT REGISTERED TRANSCEIVER, INVERTED OUTPUT, PDSO24 |
| SN74ALS651ADW | ALS SERIES, 8-BIT REGISTERED TRANSCEIVER, INVERTED OUTPUT, PDSO24 |
| SN74ALS653NT | ALS SERIES, 8-BIT REGISTERED TRANSCEIVER, INVERTED OUTPUT, PDIP24 |
相關代理商/技術參數 |
參數描述 |
|---|---|
| SN74ALS646A-1DWE4 | 功能描述:總線收發器 Octal Registered Bus Trncvr W/3-St Otpt RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| SN74ALS646A-1DWG4 | 功能描述:總線收發器 Octal Registered Bus TRNSCVR RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| SN74ALS646A-1DWR | 功能描述:總線收發器 Octal Registered Bus Trncvr W/3-St Otpt RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| SN74ALS646A-1DWRE4 | 功能描述:總線收發器 Octal Registered Bus Trncvr W/3-St Otpt RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| SN74ALS646A-1DWRG4 | 功能描述:總線收發器 Octal Registered Bus TRNSCVR RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
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