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參數資料
| 型號： | SN74ALVCH16271DGG |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | Ceramic Chip Capacitors / MIL-PRF-55681; Capacitance [nom]: 150pF; Working Voltage (Vdc)[max]: 100V; Capacitance Tolerance: +/-1%; Dielectric: Multilayer Ceramic; Temperature Coefficient: C0G (NP0); Lead Style: Surface Mount Chip; Lead Dimensions: 1206; Termination: 100% Tin (Sn); Body Dimensions: 0.125" x 0.062" x 0.051"; Container: Bag; Features: MIL-PRF-55681: M Failure Rate |
| 中文描述： | 12位至24位復用總線交換具有三態輸出 |
| 文件頁數： | 1/10頁 |
| 文件大小： | 136K |
| 代理商： | SN74ALVCH16271DGG |
SN74ALVCH16271
12-BIT TO 24-BIT MULTIPLEXED BUS EXCHANGER
WITH 3-STATE OUTPUTS
SCES017E – JULY 1995 – REVISED FEBRUARY 1999
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
Member of the Texas Instruments
Widebus
Family
EPIC
(Enhanced-Performance Implanted
CMOS) Submicron Process
ESD Protection Exceeds 2000 V Per
MIL-STD-883, Method 3015; Exceeds 200 V
Using Machine Model (C = 200 pF, R = 0)
Latch-Up Performance Exceeds 250 mA Per
JESD 17
Bus Hold on Data Inputs Eliminates the
Need for External Pullup/Pulldown
Resistors
Package Options Include Plastic Shrink
Small-Outline (DL) and Thin Shrink
Small-Outline (DGG) Packages
description
This 12-bit to 24-bit bus exchanger is designed for
1.65-V to 3.6-V V
CC
operation.
The
SN74ALVCH16271
applications in which two separate data paths
must be multiplexed onto, or demultiplexed from,
a single data path. This device is particularly
suitable as an interface between conventional
DRAMs and high-speed microprocessors.
is
intended
for
A data is stored in the internal A-to-B registers on
the low-to-high transition of the clock (CLK) input,
provided that the clock-enable (CLKENA) inputs
are low. Proper control of these inputs allows two
sequential 12-bit words to be presented as a
24-bit word on the B port.
Transparent latches in the B-to-A path allow asynchronous operation to maximize memory access throughput.
These latches transfer data when the latch-enable (LE) inputs are low. The select (SEL) line selects 1B or 2B
data for the A outputs. Data flow is controlled by the active-low output enables (OEA, OEB).
To ensure the high-impedance state during power up or power down, the output enables should be tied to V
CC
through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of
the driver.
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.
The SN74ALVCH16271 is characterized for operation from –40
°
C to 85
°
C.
Copyright
1999, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC and Widebus are trademarks of Texas Instruments Incorporated.
DGG OR DL PACKAGE
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OEA
LE1B
2B3
GND
2B2
2B1
V
CC
A1
A2
A3
GND
A4
A5
A6
A7
A8
A9
GND
A10
A11
A12
V
CC
1B1
1B2
GND
1B3
LE2B
SEL
OEB
CLKENA2
2B4
GND
2B5
2B6
V
CC
2B7
2B8
2B9
GND
2B10
2B11
2B12
1B12
1B11
1B10
GND
1B9
1B8
1B7
V
CC
1B6
1B5
GND
1B4
CLKENA1
CLK
相關PDF資料 |
PDF描述 |
|---|---|
| SN74ALVCH16271DL | 12-BIT TO 24-BIT MULTIPLEXED BUS EXCHANGER WITH 3-STATE OUTPUTS |
| SN74ALVCH162721DGG | Ceramic Chip Capacitors / MIL-PRF-55681; Capacitance [nom]: 150pF; Working Voltage (Vdc)[max]: 100V; Capacitance Tolerance: +/-1%; Dielectric: Multilayer Ceramic; Temperature Coefficient: C0G (NP0); Lead Style: Surface Mount Chip; Lead Dimensions: 1206; Termination: 100% Tin (Sn); Body Dimensions: 0.125" x 0.062" x 0.051"; Container: Bag; Features: MIL-PRF-55681: R Failure Rate |
| SN74ALVCH162820DGG | 3.3-V 10-BIT FLIP-FLOP WITH DUAL OUTPUTS AND 3-STATE OUTPUTS |
| SN74ALVCH162827DGV | 20-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS |
| SN74ALVCH162827DGG | 20-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS |
相關代理商/技術參數 |
參數描述 |
|---|---|
| SN74ALVCH16271DGGR | 功能描述:通用總線函數 12-24bit Reg Bus RoHS:否 制造商:Texas Instruments 邏輯類型:CMOS 邏輯系列:74VMEH 電路數量:1 開啟電阻（最大值）: 傳播延遲時間:10.1 ns 電源電壓-最大:3.45 V 電源電壓-最小:3.15 V 最大工作溫度:+ 85 C 最小工作溫度:0 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| SN74ALVCH16271DL | 功能描述:通用總線函數 12-24bit Reg Bus RoHS:否 制造商:Texas Instruments 邏輯類型:CMOS 邏輯系列:74VMEH 電路數量:1 開啟電阻（最大值）: 傳播延遲時間:10.1 ns 電源電壓-最大:3.45 V 電源電壓-最小:3.15 V 最大工作溫度:+ 85 C 最小工作溫度:0 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| SN74ALVCH16271DLR | 功能描述:通用總線函數 12B To 24B Multplx Bus Exchngr RoHS:否 制造商:Texas Instruments 邏輯類型:CMOS 邏輯系列:74VMEH 電路數量:1 開啟電阻（最大值）: 傳播延遲時間:10.1 ns 電源電壓-最大:3.45 V 電源電壓-最小:3.15 V 最大工作溫度:+ 85 C 最小工作溫度:0 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| SN74ALVCH162721DGG | 制造商:Texas Instruments 功能描述: |
| SN74ALVCH162721DL | 功能描述:觸發器 3.3V 20bit RoHS:否 制造商:Texas Instruments 電路數量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel |
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